2. Consider a paging system with the page table stored in memory. a. If a memory
ID: 3824691 • Letter: 2
Question
2. Consider a paging system with the page table stored in memory.
a. If a memory reference takes 110 nanoseconds, how long does a paged memory reference take?
b. If we add associative registers, and 80 percent of all page-table references are found in the associative registers(TLB), what is the effective memory reference time? (Assume that finding a page-table entry in the associativeregisters takes 15 ns, if the entry is there.)
3. Consider the following reference string:
a. How many page faults would this string produce under the FIFO page replacement strategy with three frames?
b. How many page faults would this string produce under the OPT replacement strategy with three frames?
c. How many page faults would this string produce under the LRU replacement strategy with three frames?
4. Briefly discuss the reason systems do not implement the Optimal page replacement algorithm
5. Briefly describe the enhanced second chance algorithm and compare it to FIFO and LRU.
6. What is the cause of thrashing? How does the system detect thrashing? Once it detects thrashing, what can the system
do to eliminate this problem?
7. The CPU has a logical address format with 4 bits for the page number and 2 bits for the offset. The page table for aprocess is:Page frame
15 6 I
Map the following logical addresses to physical addresses: (8 frames – 3 bits for frame #)
Logical Address Physical Address
1000 11
0011 11
1111 01
0110 10
0100 11
0010 10
1110 11
8. Consider a demand paging virtual memory system with 24 bit virtual address space, page size is (8KB or 2^13) andthe system has 8 MB of main memory. Assume the page table is single level and stored in memory.
a. When we split a logical address into page number and offset within the page, how many bits are used for the
page number, and how many bits are used for the offset?
b. Assuming page table entries are 4 bytes each and a single level page table is used, how many bytes are requiredto store a page table?
c. If the OS reserves 1 MB (128 frames) of physical memory for kernel code, buffers, etc., how many physicalframes are left for demand paging?
d. Suppose at some point in time our TLB contains the entries:
The user attempts to access the logical address 0000 0000 1000 1011 0011 0100. Is this a TLB miss? Briefly explain.
e. What is the physical address?
9. Suppose that a disk drive has 2000 cylinders, numbered 0 to 1999. The drive is currently serving a request at cylinder130, and the previous request was at cylinder 124. The queue of pending requests, in order, is
84, 1110, 30, 825, 200, 120, 980, 515, 33, 300
Starting from the current head position, what is the access sequence and the total distance (in cylinders) that the diskarm moves to satisfy all the pending requests, for each of the following disk-scheduling algorithms?
a. FCFS
b. SSTF
c. SCAN
d. LOOK
e. C-SCAN
f. C-LOOK
3 1 4 3 1 5 2 3 4 5 2 1 3 2 1Explanation / Answer
ANSWER 2
(A) 220 Nanoseconds , 110 nanoseconds to access the page and next 110 nanoseconds to access the word in memory .
(B) 147 Nanosecond , 80% of the time its 110 Ns and the other 20% of the time its 220 Ns and 15Ns for associated register . therefore
15 + ( 0.80 *110 )+(0.20*220 ) = 15 + 88 + 44 = 147 Ns .
Problem -4
Optmal Page Replacement Algorithm is one of the best page replacement algorithm , which is best and simple to use but difficult to implement because at the time when page error occured , at that time some set of pages is in memory . and in this algorithm one page will be refrenced onto the very next instruction and some pages may not be refrenced before 100's of instruction occured . Each page can be labelled with the number of instructons before the page is first refrenced .
Answer - 5
Enhanced second chance algorithm contains a refrence bit and a dirty bit as an ordered pair .Using these two bits it is further classified into four classes (0,0) (0,1) (1,0 ) (1,1) . Replace the page in this algorithm it is consider to be in round robin manner and a page is repalced that has not been accessed since from its last consideration . and the page will remain which is frequently refered . In this algorithm we have to search the circular queue for several times before replacing a page .
enhance second chance algorithm cmparing with FIFO and LRU is that in this we prefereed the page which has been modified to reduce the number of i/o required .
Answer -6
Thrashing is caused when not minimum number of page allocated and force the process to go page fault . system detect Thrashing by comparing the level of CPU utilization to the level of multiprograming . It can only be reduced by reducing the multi programming.
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