(a) Please Fill in the table and calculate the total time needed for each instru
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Question
(a) Please Fill in the table and calculate the total time needed for each instruction (b) What will be a good time for a single cycle time? When we adopt a multicycle implementation. Each step will take 1 clock cycle, please explain what will be an appropriate cycle time? please explain what is the pipelined implementation. Assume that a processor lakes 5 cycles to execute any instruction. (a) How many cycles would a non-pipelined processor take to execute 6 instructions? (b) How many cycles would a pipelined processor (5 stages) take to execute 6 instructions (we assume perfect pipelining, no stalls are added here)? (c) How about 1000 instructions, how many clock cycles are needed, what will be the estimated CPI?Explanation / Answer
Answers :
4.2 : Here if each step takes 1 clock cycle then cycle time has to be big enough that each step can be performed in that time.
- Each step in all type of instruction has to be executed in chosen cycle time. So cycle time has to be maximum time that a step can take.
- as shown in table, highest time taken to perform any step is 200ps.
- So appropriate cycle time would be 200 ps.
4.3 : Pipelined processor :
When one step or module of instruction are being executed, other remains free. Which decreases the processor efficiency.
i.e When IFetch is exacuted for one instruction, other units DEC, Exec, Mem and WB remains free.
- Pipelined processors are the processor which increases efficiency of processor by performing parallel operations.
When Dec operation is performed after IFetch, IFetch unit remains free, so in pipelined processor it gives idea to fetch next instruction while current instruction is being decoded.
Suppose processor is executing ith instruction currently, then at a same time Decoder will decode (i+1)th instruction and Instruction fetch unit will fetch (i+2)th instruction. Where in memory unit is writting (i-1)th instruction and WB unit is working on (i-2)th instruction.
This way, no unit becomes empty at given time in pipelined processor.
So piplelind processors increases efficiency of procesors by performing parallel operations.
4.4 :
(a) : Each instruction takes 5 cycles.
So 6 instruction will be executed in 5 * 6 = 30 clock cycles
(b) : In pipelined processor,
first instruction will be executed in 5 cycles , and after first instruction is executed after each clock cycle one instruction will finish its execution.
so total clock cycles = Clock cycles for first instruction + (number of instructions -1)
= 5 + 4
= 9 clock cycles.
(c) : For 100 instructions :
in non pipelined processor it would take 100* 5 = 500 clock cycles.
in pipelined processor it would take 5 + 99 = 104 clock cycles.
Here cycle per instructions would be :
CPI = cycles taken to execute 100 instructions / number of instructions
= 104/ 100
= 1.04
if you have any doubts, you can ask in comment section.
1 2 3 4 5 6 7 8 9 inst - 1 ifetch dec exec mem wb inst -2 ifetch dec exec mem wb inst 3 ifetch dec exec mem wb inst 4 ifetch dec exec mem wb inst 5 ifetch dec exec mem wbRelated Questions
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