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A bus B bus 16 REGISTERS AND C bus HORIZONTAL MICROARCHITECTURE Fig 48 The data

ID: 3807297 • Letter: A

Question

A bus B bus 16 REGISTERS AND C bus HORIZONTAL MICROARCHITECTURE Fig 48 The data path of the example Sample Instructions 1ALU TIR, IF N THEN GOTo 15 TIR 2 IR MBR 1 0 1 2 0 0 0 0 0 0 0 0 4 15 2 1 0 2 0 0 0 0 0 1 3 0 0 00 MASK INSTRUCTION KEY SMASK. 0 -A Latch 1 MBR 0- No jump 1 Jump if N 1 2 Jump if Z 1 3: Jump always 0 A, B 1 A AND B 2 A To address bus Lo A latch Blatch -L1 Address out R SH To data MAR 0 No shift bus Data in 1 Shift right 1 bit MBR M1 2 Shift left 1 bit 3 (not used) AMIX MBR MAR, RD, WR ENC 0 No ALU 1- Yes Is it used?] Shifter Data out

Explanation / Answer

in the above diagram first we will discuss about data flow sample diagram

ALU(Airthemetic Logic Unit) which performs basic airthemetic and logical operation based on the given constraints

so here we are executing an instruction "IF N THEN GOTO 15"

condition satisfies then it goes to instruction number "15"

this ALU and CU have their own registers internally to execute their functions

in the second diagram we have instruction key

before discussing it we have registers as 2 catagories

1.general registers:

ACC(accumulator),IR(instruction register),PC(program counter),TMP(temporary register),AMASK(address mask)

2.other registers:

MAR(memory address register),MBR(memory buffer register),,MPC(microprogram counter)

so based on the instructions by using registers the process continues

in AMUX:

for "0" a latch and for "1" we are using "MBR"

so in the same way remaing all happens

third diagram:

here the instructions are 16 bits

so high -order 3 bits are the opcode

and the lower -order 13 bits are the address

so the communication happens in three "buses" and if any instruction came it will check if we need to perform any airthemetic or logical operatins if yes then it goes to "ALU" and there with in that any shift operation that will done and finally the outcome comes from data out