thanks in advance! The work on this examination is to be your own and you are ex
ID: 3806481 • Letter: T
Question
thanks in advance!
The work on this examination is to be your own and you are expected to adhere to the UMass-Boston honor system. All questions can be answered by either circling the correct answer(s) or by one or two short sentences. In the latter case, brevity counts. Do not try to make up for a lack of understanding by providing a rambling answer. What is the disadvantage of using memory mapped I/O? Name 2 differences between a hardware interrupt and a system call trap. What is a critical region? For serial port I/O, bit _ and _ of the _ register is used to indicate whether Tx or Rx interrupts have occurred. How does the CPU know which hardware device is requesting interrupts? Why does the cpu have to send EOI to the PIC ? What does it mean that the TSL instruction is atomic?Explanation / Answer
1)what is the disadvantage of memory mapped i/o
Memory-mapped I/O uses the same bus to address both memory and I/O devices,There is data transfer restriction in case of memory mapped instructions.
Performance does not increase every time with memory-mapped I/O.
Windows is unable to truncate a memory-mapped file.
If some operating systems have a unified buffer cache instead of MMIO, the implementation is bugfull.
2) Name 2 differences between a hardware interrupt and system call trap
Hardware interrupts are called Interrupts, While software interrupts are called Traps.
An interrupt is an event within a program that suspends normal processing and temporarily diverts the flow of control to some other routine,
A trap is program logic that you would write to catch, or "trap", and error as it occurs.
If hardware interrupts are occur then usually disable other hardware interrupts.
3) What is the critical region?
The critical section is group of instructions/statements or region of code that need to be executed atomically.
It cannot be executed by more than one process,the critical section accesses a shared resource.
When one process is executing shared data in its critical section,
no other process is to be allowed to execute in its critical section.
4) For serial port i/o ,bit 4 and 5 of the interrupt mask register is used to indicate whether Tx or Rx interrupts have occured.
5) How does the CPU know which hardware device is requesting interrups?
Hardware interrupts are used by devices to communicate that they require attention from the operating system.
Internally, hardware interrupts are implemented using electronic alerting signals that are sent to the processor from an external device,
which is a part of the computer,Each Hardware device or set of devices will have its own Interrupt Request line. Based on this request the
CPU will dispatch the request to the appropriate hardware driver.
6) Why does the cpu have to send EOI to the PIC?
To tell the PIC that the end of an interrupt has occurred we send EOI to PIC for informing it that handler is finished.
7) What does it mean that the TSL instruction is atomic?
TSL instruction is atomic means TSL executing on one processor must complete before another TSL executes on other processor,
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