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2.17 Assume that we would like to expand the LEGv8 register file to 128 register

ID: 3801823 • Letter: 2

Question

2.17 Assume that we would like to expand the LEGv8 register file to 128 registers and expand the instruction set to contain four times as many instructions.

2.17.1 [5] <§2.5> How would this affect the size of each of the bit fields in the R-type instructions?

2.17.2 [5] <§2.5> How would this affect the size of each of the bit fields in the I-type instructions?

2.17.3 [5] <§§2.5, 2.8, 2.10> How could each of the two proposed changes decrease the size of a LEGv8 assembly program? On the other hand, how could the proposed change increase the size of an LEGv8 assembly program?

Explanation / Answer

Instructions to the processor are encoded as a 32 bit binary number.

For LEGv8 instructions

Each assembly instruction and its parameters correspond to a unique machine language instruction.

An instruction is encoded as a 32-bit instruction word

Representing Instructions:

A machine code instruction is given in a set number of distinct formats (i.e. the layout of the instruction)

i.e. one for load/store, one for arithmetic operations etc.

Each format is composed of a number of distinct fields such as:

Opcode: the field that denotes the operation (function) and format of an instruction.

for a load/store, contains the address offset

Register operand: the 32 registers used in LEGv8 are simply referred to by their number (0 to 31)

Each field of a machine code instruction can be simply be thought as a number.

Each format is similar, but not identical.

LEGv8 R-format Instructions:

Opcode: 11 bits

Rm: 5 bits

Shamt: 6 bits

Rn: 5 bits

Rd: 5 bits

This format is used for instructions specified using three registers (R), such as add operations.

The instruction fields are:

opcode: operation code. Dictates which format type to use.

shamt: shift amount

2.5 How would this affect the size of each of the bit fields in the R-type instructions?

Since the default number of registers in LEGv8 is 32 registers, it takes a 5-bit number to identify one

Shamt: 7 bits

Rm: 5 bits

Rn: 5 bits

Rd: 5 bits

Total: 32 bits

That being said, you need to increase the size of all R-type instructions bit-fields by 2 bits eachand the opcode will increase by 4 bits as it started as 10 bits (double 5 bits)

Making the new size of each of the bit-fields in the R-type instructions would be:

Opcode: 14 bits

Shamt: 9 bits

Rm: 7 bits

Rn: 7 bits

Rd: 7 bits

Total: 44 bits.

Log2(128) = 7

Opcode: 6

rs: 7

rt: 7

rd: 7

Shamt: 5

funct: 6

How would this affect the size of each of the bit fields in the I-type instructions?

Log2(128) = 7

Opcode: 6

rs: 7

rt: 7

immidiate: 16

How could each of the two proposed changes decrease the size of a LEGv8 assembly program? On the other hand, how could the proposed change increase the size of an LEGv8 assembly program?

If the instruction encoding is longer than that also means the programs will be longer thatdo the same operations. This means that the format may be larger because theincreases are not aligned.If there are more registers then that means that they can holdmore information/data without going out to memory leading to fewer calls of load/storeso the code will decrease.