Hello I was wondering if someone could help with 5.7.1 and 5.7.2. not quite sure

Question

Hello I was wondering if someone could help with 5.7.1 and 5.7.2. not quite sure I understand. I included 5.2 just for the refrences

5.2 Caches are important to p to processors. Below is a list of 32-bit memory address references, given as word addresses. 3. 180. 43. 2. 191. 88. 190. 14. 181.44. 186. 253 51 [10]$5.4> Using the sequence of references from Exercise 5.2, show the final cache contents for a three-way set associative cache with two-word blocks and a total size of 24 words. Use LRU replacement. For each reference identify the index bits, the tag bits, the block offset bits, and if it is a hit or a miss. 5.7.2 10 Using the references from Exercise 5.2, show the final cache contents for a fully associative cache with one-word blocks and a total size of 8 words. Use LRU replacement. For each reference identify the index bits, the tag bits, and if it is a hit or a miss.

Explanation / Answer

Tag Bits - Length of the Address bit + index exponent + offset Exponent = 0

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