You purchase a machine with the following features: • 85% of all memory access a
ID: 3766171 • Letter: Y
Question
You purchase a machine with the following features:
• 85% of all memory access are found in the cache
• Each cache block is two words, and the whole block is read on any miss
• The processor sends references to its cache at the rate of 109 words per second
• 30% of those references are writes
• Assume that the memory system can support 109 words per second, reads or writes
• The bus reads or writes a single word at a time (the memory system cannot read or write two words at once)
• Assume at any one time, 40% of the blocks in the cache have been modified
• The cache uses write allocate on a write miss You are considering adding a peripheral to the system, and you want to know how much of the memory system bandwidth is already used.
Calculate the percentage of memory system bandwidth used on average for the following two cases (be sure to state any assumptions):
(A) The cache is write through
(B) The cache is write back
Explanation / Answer
b)
Given that
Hit ratio=0.85
Miss rate=0.15
CPU sends references at the rate of 109 words per second.
Total writes out of 109 words per second = 30%
Total reads out of 109 words per second = 70%
Memory bandwidth is the rate at which data can be read from or stored into memory by a processor. Can be said in bytes/second
System supports 109 words per second . Thus the band width =109 words per second.
WRITE BACK
Bus band width used
Reason
Read miss
109*0.15*0.70*[2*0.4+2]
=109 X 0.294
If there is a read miss , the data transfer is occurred from main memory to cache.
Band width used on read miss= bus band width * miss ration*percentage of reads*[number of words per block*probability of the block is dirty + number of words to be read to replace]
Write miss
109*0.15*0.30*[2*0.4+2]
=109 X 0.126
Total Bandwidth used= band width used on read miss + band width used on write miss
=109 X 0.294 + 109 X 0.126
=109 X( 0.294+ 0.126 )
=109 X 0.42
Average band width utilized= band width utilized / available band width
= 109 X 0.42 / 109
= 0.42
= 42 %
WRITE BACK
Bus band width used
Reason
Read miss
109*0.15*0.70*[2*0.4+2]
=109 X 0.294
If there is a read miss , the data transfer is occurred from main memory to cache.
Band width used on read miss= bus band width * miss ration*percentage of reads*[number of words per block*probability of the block is dirty + number of words to be read to replace]
Write miss
109*0.15*0.30*[2*0.4+2]
=109 X 0.126
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