1. Assume that we have a demand-paged memory. The page table is held in register

Question

1. Assume that we have a demand-paged memory. The page table is held in registers. It Takes 8 miliseconds to service a page fault if an empty frame is available or if the replaced page is not modified and 20 miliseconds if the replaced page is not modified and 20 milliseconds if the replacement page is modified. Memory-access time is 100 nanoseconds. Assume that the page to be replaced is modified 30 percent of the time. What is the maximum acceptable page-fault rate for an effective access time of no more than 200 nanoseconds.

In answering question 2, assume that the indirect instruction is not cached.

2. Suppose that a machince provides instructions that can access memory locations using the one-level indirect addressing scheme. What sequence of page faults is incurred when all of the pages of a program are currently nonresident and the first instruction of the program is an indirect memory-load operation? What happens when the operating system is using a per-process frame allocation technique and only two pages are allocated to this process?

Explanation / Answer

1.A.

0.2 _sec = (1 P) × 0.1 _sec + (0.3P) × 8 millisec + (0.7P) × 20 millisec

0.1 = 0.1P + 2400 P + 14000 P

0.1 _ 16,400 P

P _ 0.000006

2.A.The page faults take place: page fault to access the instruction, a page fault to access the memory location that contains a pointer to the target memory location, and a page fault when the target memory location is accessed. The operating system will generate three page faults with the third page replacing the page containing the instruction. If the instruction needs to be fetched again to repeat the trapped instruction, then the sequence of page faults will continue indefinitely. If the instruction is cached in a register, then it will be able to execute completely after the third page fault.

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