** Computer Organization and Architecture (Stallings 10th edition)** Consider th
ID: 3705128 • Letter: #
Question
** Computer Organization and Architecture (Stallings 10th edition)** Consider the example in Section 2.5 for the calculations of average CPI and MIPS rate, which yielded the result of CPI = 2.24 and MIPS rate = 178. Now assume that the program can be executed in four parallel tasks or threads with roughly equal number of instructions executed in each task. Execution is on a 4-core system with each core (processor) having the same performance as the single processor originally used. Coordination and synchronization between the parts adds an extra 15,000 instruction executions to each task. Assume the same instruction mix as the example for each task, but decrease the CPI for memory reference with cache miss to 6 cycles as a result of design improvements. a. Determine the average CPI b. Determine the corresponding MIPS rate c. Calculate the speed-up factor
Explanation / Answer
Question a
The table based on the given instruction
The average CPI =
(1 * 60/100) + (2 * 18/100) + (4 * 12/100) + (12 * 0.1/100)
=2.64
Question b
The corresponding MIPS Rate = 400 / 2.64 = 152
Question c
Execution Time T = IC/(MIPS * 10^6)
For 1 processor t1 = (2 * 10^6)/(178 * 10^6) = 11ms
For 4 processor with the 15000 = (((2 * 10^6)/4) + (0.015 * 10^6))/152 * 10^6
Speedup = Time for single processor / time for n processor = 11/0.0033=3.6 ms
Instruction Type CPI Instruction Mix(in %) Logic & Arithmetic 1 60 Load/Store with cache hit 2 18 Branch 4 12 Memeory reference along with cache miss 12 10Related Questions
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