File \"io.s\" lets you read characters from and echo characters to the console b

Question

File "io.s" lets you read characters from and echo characters to the console by using interrupts and polling. When you run the program, you need to run it step by step and try to see the changes in the Status and Cause Registers (they can be found on the top left of QtSPIM). Enable the memory-mapped /O, load the file "io.s" and run the program. When running it, write to the console 6 lines of numbers or text. For example: This Is Computer Architecture Lab 4 Try to see the changes that occur. Write your observations and discuss what the differences between polling and interrupts are. Explain how the interrupts are enabled. Are the interrupts enabled or disabled during polling? Include what would happen if they were enabled. Also, check the registers that save the changes before and after executing the exception. Analyze the exception response code Note: Before doing this assignment, read Appendix A of the manual. In Appendix B you will find the ASCII codes for all the characters.

Explanation / Answer

Interrupts vs polling:

Explanation:

So in order to avoid tying down the microcontroller, interrupts are used. For example, in discussing timers in Chapter 9 we used the instruction “JNB TF, target”, and waited until the timer rolled over, and while we were waiting we could not do anything else. That is a waste of the microcontroller’s time that could have been used to perform some useful tasks. In the case of the timer, if we use the interrupt method, the microcontroller can go about doing other tasks, and when the TF flag is raised the timer will interrupt the microcontroller in whatever it is doing.

Interrupt service routine :

For every interrupt, there must be an interrupt service routine (ISR), or interrupt handler. When an interrupt is invoked, the microcontroller runs the interrupt service routine. For every interrupt, there is a fixed location in memory that holds the address of its ISR. The group of memory locations set aside to hold the addresses of ISRs is called the interrupt vector table.

Interrupts :

An interrupt is a signal (an "interrupt request") generated by some event external to the CPU , which causes the CPU to stop what it is doing (stop executing the code it is currently running) and jump to a separate piece of code designed by the programmer to deal with the event which generated the interrupt request.

Enabling Interrupts :

Every interrupt source will have some way to enable or disable it - usually an enable bit in a configuration register. At the end of the interrupt configuration sequence for that peripheral, the interrupt will be enabled. But this will not cause interrupts to begin to be serviced.

The CPU will also have a global interrupt enable mechanism (again, usually a bit in a configuration register) which allows it to process interrupts. This global interrupt enable will typically be set after all the individual interrupt enables have been set, which is to say, after all the individual interrupt sources have been configured.

example :

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