7.Tightly coupled multiprocessor systems Select one: a. Share a common memory an

Question

7.Tightly coupled multiprocessor systems

Select one:

a. Share a common memory and the same set of I/O devices

b. Share different memories and different set of I/O devices

c. Share a common memory and different set of I/O devices

d. None of the mentioned

8.

The ways in which I/O’s can be controlled are

Select one:

a. Programmed I/O, Interrupt-Driven I/O, Direct Memory Access, and Channel I/O.

b. Programmed I/O, Interrupt-Driven I/O, Memory-Mapped I/O, Direct Memory Access, and Channel I/O.

c. Programmed I/O, Memory-Mapped I/O, Direct Memory Access, and Channel I/O.

d. Programmed I/O, Interrupt-Driven I/O, Memory-Mapped I/O, and Channel I/O.

9.

RISC have, amongst other specifications,

Select one:

a. Single-cycle instructions, fixed length instructions, with few addressing modes.

b. Single-cycle instructions, fixed length instructions, microprogrammed control, with few addressing modes.

c. Single-cycle instructions, variable length instructions, with few addressing modes.

d. Single-cycle instructions, fixed length instructions, parameter passing through memory, with few addressing modes.

10.

Embedded systems programmers need not understand every detail about the hardware

Select one:

True

False

11.

In a computer environment, slow I/O device(s) will impact system performance due to a so-called ripple effect

Select one:

True

False

12.

I/O subsystems comprise of

Select one:

a. Blocks of main memory, buses, and special interpreter

b. Blocks of main memory, buses, interfaces and special cabling

c. Blocks of main memory, buses, and special compiler

d. Blocks of main memory, buses, and special cabling

13.

SRAM is a very fast memory and it doesn’t need to be refreshed like DRAM does.

Select one:

True

False

14.

Superscalar architectures include a single execution unit such as specialized integer and floating-point adders and multipliers.

Select one:

True

False

15.

Parallel processing is capable of economically increasing system throughput while providing better fault tolerance

Select one:

True

False

16.

A serial data transmission link uses

Select one:

a. Two wires

b. Eight wires

c. Nine wires

d. One wire

17.

In content addressable cache memory, a subset of the bits of the main memory address called fields are organized as

Select one:

a. Tag, Block and offset fields

b. Set, Tag, Flag, Block, and offset fields

c. Set, Tag, and offset fields

d. Set, Tag, Block, and offset fields

18.

For the software in embedded systems, memory limitations are almost always a software development constraint and this is due to lack of input and output memory mapping

Select one:

True

False

19.

Effective Access Time is calculated using

Select one:

a. Acces times, hit rates, miss rates, and miss penalties.

b. Acces times, hit rates, and miss rates.

c. Hit rates, miss rates, and miss penalties.

d. Acces times, hit rates, and miss penalties.

20.

Virtual memory uses

Select one:

a. Part of main memory and all of the hard drive

b. Part of main memory and none of the hard drive

c. Part of main memory and part of the hard drive

d. No part of main memory and all of the hard drive

Explanation / Answer

The question has a 13 Parts, out of that 8 parts are answered here. The details of answered question is as follows:

(7) A multi processor system is a system, which has more than one processing unit, which shared the main memory and IO devices (peripherals). Therefore (a) is the correct answer.

(8) Various IO mechanisms for Input and output for computer system are: Interrupt driven, Memory mapped, DMA, and programmed IO. Therefore (b) is correct answer.

(9) RISC has fewer instructions with fewer addressing modes, Hardwired controls, single clock cycle execution, and fixed length instruction. Therefore (b) is correct answer.

(10) In Embedded system we have limited hardware resources and need to optimally use these resources while programming. Therefore the programmer needs to know the details of hardware so that all hardware can be used optimally.

The answer is true.

(11) IO devices are slow than CPU. Therefore if IO is slow and overall performance is dragged due to ripple effect. This becomes prominent if virtual memory is involved.

So answer is true.

(12) IO subsystem has main memory, a bus that carries data, Interface with devices (I/O) and cabling/Bus to connect the devices. Therefore (b) is correct answer.

(13) SRAM needs not be refreshed in clock cycle where as DRAM needs to be refreshed hundreds of time in clock cycle. SRAM is used as cache memory and DRAM as Physical memory. SRAM is faster than DRAM.

Ans is True.

(14) Superscalar architecture includes multiple execution units along with specialized integer and floating-point adders and multipliers. Therefore answer is False.

15.

Using parallel processing we can achieve higher throughput through processing higher amount of data. In addition, the other processing unit can also be used as standby in case of failure of the main processing unit which provide fault tolerance. There are various techniques used to achieve FT using parallel/multi-processing.

Therefore, statement is TRUE.

16.

In serial transmission data is sent over one wire one bit at time. So answer (d) is correct.

17.

In content, addressable cache memory main memory set of bits are called Tag, Block and word or offset fields. Therefore (a) is correct answer.

18.

Ans. This is because in Embedded systems memory is limited and Virtual memory is not suitable the reason being using VM we cannot get deterministic response time. So the statement is FALSE.

19.

Memory is accessed if TLB miss is there otherwise data is access from cached. Effective access time considers access times, hit rates, miss rates, and miss penalties. Therefore (a) is correct answer.

20.

Virtual Memory emulates large memory through use of main memory and HDD. In this part of memory and part of HDD is used. Therefore (c) is correct answer.

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