1. (6 pts) What are three operation modes of HC12 microcontrollers? And for each
ID: 3700537 • Letter: 1
Question
1. (6 pts) What are three operation modes of HC12 microcontrollers? And for each mode, specify the sizes of external address and data buses What kind of circuit do you need in order to extract address signals from a CPU with multiplexed address and data signals? 3. Why should a bidirectional buffer be used when connecting a CPU to the data bus? 4. In the following circuit, there is an Optional Latch. Why is the Latch optional? In what situation it is essential and in what situation it is not necessary?Explanation / Answer
The operation modes classified into two categories:
A. Normal operating modes
B. special operating modes.
The special operating modes are used for testing and development. This allows an external processor to control on-chip peripherals for testing purposes.
Both the normal and special operating modes include single-chip modes in which the external buses are not active.
In both the modes, ports A, B, and E can be used for general purpose I/O.
In the expanded modes, external data and address buses are used to allow off-chip devices to be incorporated in an application.
So instead of having some bus lines for the address, and some more for the data, may be inserted to the address on the data line, it gets read, then the data on the same lines, and it gets read and stored at the previously read address.
Program counter (PC)
An incrementing counter that keeps track of the memory address of the instruction that is to be executed next or in other words, holds the address of the instruction to be executed next.
Memory address register (MAR)
Holds the address of a block of memory for reading from or writing to.
Memory data register (MDR)
A two-way register that holds data fetched from memory (and ready for the CPU to process) or data waiting to be stored in memory. (This is also known as the memory buffer register (MBR).)
Instruction register (IR)
A temporary holding ground for the instruction that has just been fetched from memory.
Control unit (CU)
Decodes the program instruction in the IR, selecting machine resources, such as a data source register and a particular arithmetic operation, and coordinates activation of those resources.
Arithmetic logic unit (ALU)
Performs mathematical and logical operations.
Floating-point unit (FPU) .
Computer Cpu’s have different cycle based on different instruction sets. Normally the signal instruction circuit is used for extracting the datas.
As well as bidirectional buffer increases the driving capacity of driving data bus. Bidirectional buffer normally allows the flow of the data from both the direction.
It can be used to isolate other gates or circuit stages from each other preventing the impedance of one circuit from affecting the impedance of another. Hence it can be used for power amplification of a digital signal as they have what is called a high “fan-out” capability.
Latch is a circuit normally store one or more bits with 1:1 input or output ratio. It is also called as a digital IC that hold data 1 or 0 until get cleared. Latch is optional as latches are a very poor match for logic systems. Latch is more sensitive to noise means that whenever there is change in the input output will change, that will give race condition in the output. Latches are almost always unintentionally inferred by poorly written source code. Latch is preferred in design where Latches supply the low pin numbered designs.
Master-Slave version..
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