Below is a representation of an instruction memory in the control unit of a proc

Question

Below is a representation of an instruction memory in the control unit of a processor. For readability, the assembly language representation of each instruction is shown in place of its machine code.

Assume that at time T the program counter of the processor contains address 2. What is the value of the program counter after the program executes for 16 more clock cycles?

SUB R2,Input

Address Instruction 0 ADD R2,Input 1 EOR R1,Input 2 ADD R1,Input 3 ADD R1,Input 4 OR R3,R1 5 ADD R3,Input 6 OR R3,R0 7 MOV R3,R0 8 JMP 3 9 SUB R3,Input 10 ADD R0,Input 11 SUB R1,R0 12 ADD R2,R1 13 AND R2,R3 14 EOR R1,R2 15

SUB R2,Input

Explanation / Answer

An instruction cycle (sometimes called fetch-decode-execute cycle) is the basic operation cycle of a computer. It is the process by which a computer retrieves a program instruction from its memory, determines what actions the instruction requires, and carries out those actions.

The cycle is then repeated.

in sequentail execution for each instruction we need 4 clock cycles soafter 16 clock cycles the pc value is 6

in pipelined execution the pc is increament for every clock cycle so after 16 clock cycles the pc value is 2

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