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1 Goal The goal of this lab is to make an interrupt driven four-digit seven-segm

ID: 3640380 • Letter: 1

Question

1 Goal
The goal of this lab is to make an interrupt driven four-digit seven-segment LED counter that increments at 1 Hz using RTI module of the HCS12. RTI is a two-stage counter circuit that is derived from the oscillator clock (OSCCLK), which runs at 8 MHz on the Dragon12-Plus board. The interrupt from RTI is intended for the software clock.
2 RTI Interrupt
1. The RTI counters are configured by RTICTL register. Bits 6-4 select one of the outputs of a binary counter. Bits 3-0 set the 4-bit modulus counter. The frequency dividers are available in Table 47 (page 288) of the MC9S12DP256.pdf document, which can be found at http://cache.freescale.com/files/microcontrollers/doc/data_sheet/MC9S12DP256.pdf?fsrch=1&sr=1
2. A non-zero value in RTICTL[6-4] turns on the RTI counters.
3. RTI interrupt is enabled by bit 7 of CRGINT register.
4. RTI interrupt flag is bit 7 of CRGFLG register. Write a ‘1’ to the flag bit clears the interrupt flag.
5. Configure RTICTL to generate interrupts at 244Hz.
6. Toggle a bit of PORTB in the interrupt handler and use oscilloscope to verify the frequency. (when you toggle, the measured frequency is half the interrupt frequency)
7. Increment a global char variable in the interrupt handler.
8. The syntax of an interrupt handler in CodeWarrior is
#pragma CODE_SEG NON_BANKED
interrupt 7 void isrRTI(void) // 7 is the interrupt number; function name isrRTI has no relevance
{
// increment the global variable
// toggle a PORTB pin
// clear RTIF bit in CRGFLG
}
#pragma CODE_SEG DEFAULT
9. In the main( ) function, write an infinite loop. In the loop, check the value of the global variable. When the value is greater or equal to 4, subtract 4 off the variable and toggle a different bit of PORTB. Use the scope to verify the frequency. It should be 60.5 Hz.
10. Combine the RTI interrupt with the counter program from the previous lab. For every 244 interrupts, increment the counter once.
3 Four-Digit Counter
The four-digit seven-segment display is multiplexed in hardware. The display pattern is controlled by port B and each digit is enabled by an output bit of PTP bits 3-0. To display four different digits, the software needs to do time division multiplexing. Each timeslot is divided into four equal sub-timeslots. In each sub-timeslot, one digit is enabled. For a stationary image, the visual threshold of flickering is above 50 Hz. Each digit needs be displayed at least 50 times a second, and for four digits, 200 sub-timeslots or greater are required for a stable display.
11. Use the 244 Hz RTI interrupt to pace the time division multiplexing. Create an array to hold four display patterns for four digits of the display. For each interrupt, the next digit pattern is fetched from the array and written to port B then the bit in port P is enabled for that digit.
12. For every 244 interrupts (a second), a counter is incremented. The value of the counter is converted to four seven-segment patterns for four display digits and stored in the array.
13. Initialized the counter to a value near 9999 to test the roll over

Explanation / Answer

;Displaying Overflow Timer on LEDs of PORTB in Assembly for Dragon12+ Trainer with Codewarrior ;Modified from Example 9-3 in HCS12 book by Mazidi & Causey ABSENTRY Entry ; for absolute assembly: mark this as application entry point ; Include derivative-specific definitions INCLUDE 'mc9s12dp256.inc' ;CPU used by Dragon12+ board ;code section ORG $4000 ;Flash ROM address for Dragon12+ Entry: LDS #$4000 ;Stack LDAA #$FF STAA DDRB ;Make PORTB output ;PTJ1 controls the LEDs connected to PORTB (For Dragon12+ ONLY) LDAA #$FF STAA DDRJ ;Make PORTJ output, (Needed by Dragon12+) LDAA #$0 STAA PTJ ;Turn off PTJ1 to allow the LEDs on PORTB to show data (Needed by Dragon12+) ; ;-------Toggling ALL LEDs connected to PORTB LDAA #$80 STAA TSCR1 LDAA #$04 ;Prescaler=16 (Try 0-7 values to see changes on LEDs) STAA TSCR2 LDAA #0 OVER BSET TFLG2,%10000000 ;clear the Timer overflow flag (writing HIGH clears it) H1 BRCLR TFLG2,mTFLG2_TOF,H1 ;wait for Timer Overflow INCA ;keep adding the overflows STAA PORTB ;and dump it on PORTB to see BRA OVER ;************************************************************** ;* Interrupt Vectors * ;************************************************************** ORG $FFFE DC.W Entry ;Reset Vector. CPU wakes here and it is sent to start of the code at $4000 ;Sounding the Buzzer on PT5 using Chann 5 Timer (Output Compare option) ;PT5 of PORTT is connected to buzzer/speaker on Dragon12+ board ;Notice this is NOT using any Time Delay ;Modified from Example 9-11 HCS12 book by Mazidi & Causey for Dragon12+ board/CodeWarrior ABSENTRY Entry ; for absolute assembly: mark this as application entry point ; Include derivative-specific definitions INCLUDE 'mc9s12dp256.inc' ;CPU used by Dragon12+ board ;code section ORG $4000 ;Flash ROM address for Dragon12+ Entry: LDS #$4000 ;Stack BSET DDRT,%00100000 ;Make PT5 an out for Buzzer ;---Sound the Buzzer by toggling PT5 pin using Timer chan 5 ;Timer Chan5 set-up LDAA #$80 ;if you use $90, then NO need for "BSET TFLG1,%00100000" STAA TSCR1 ;at the end of this program righ above BRA OVER LDAA #$07 ;Prescaler=128. Change (0-7) to hear different sound STAA TSCR2 BSET TIOS,%00100000 ;Output Compare option for Channel 5 LDAA #%00000100 ;Toggle PT5 pin option STAA TCTL1 OVER LDD TCNT ADDD #5000 ;Change this number to hear different sound STD TC5 HERE BRCLR TFLG1,mTFLG1_C5F,HERE BSET TFLG1,%00100000 ;Clear the Chan 5 Timer flag for next round (writing HIGH will clear it). No need for this if you use TSCR1=$90 BRA OVER ;************************************************************** ;* Interrupt Vectors * ;************************************************************** ORG $FFFE DC.W Entry ;Reset Vector. CPU wakes here and it is sent to start of the code at $4000 ;Interrupt Programming with CodeWarrior on Dragon12+ with PTH Interrupt ;An LED on PORTB Toggles continuously while waiting for AN Interrupt from PTH ;Buzzer will sound for short period of time if any of DIP Switches on PTH is activated (going from H-to-L). ;MAKE SURE to choose "absolute" for memory model(NO relocatable) when creating porject for Interrupts ;Written and tested by Mazidi. See Chpater 11 of HCS12 textbook by Mazidi & Causey ABSENTRY Entry ; for absolute assembly: mark this as application entry point ; Include derivative-specific definitions INCLUDE 'mc9s12dp256.inc' ;CPU used by Dragon12+ board ;----------------------USE $1000-$2FFF for Scratch Pad R1 EQU $1001 R2 EQU $1002 R3 EQU $1003 R4 EQU $1004 ;how long to sound the buzzer. During the buzzer sound LED stops toggleing. Why? ;code section ORG $4000 ;Flash ROM address for Dragon12+ Entry: LDS #$4000 ;Stack LDAA #$FF STAA DDRB ;MAKE PORTB AN OUTPUT PORT BSET DDRJ,%00000010 ;MAKE PORTJ1 AN OUTPUT PIN BCLR PTJ,%00000010 ;TURN OFF PORTJ1 TO ALLOW LEDs ON PORTB TO SHOW DATA BSET DDRT,%00100000 ;PTT5 as Output pin for buzzer ; INTERRUPT SET-UP FOR PTH Interrupt LDAA #0 ;PTH as input STAA DDRH LDAA #$FF ; STAA PIEH ;Enable PTH interrupt LDAA #$0 STAA PPSH ;Make PTH Interrupt level trigger. CLI ;ENABLE INTERRUPTS GLOBALLY ;-------Toggle PB0 forever and wait for interrupt BACK BSET PORTB,%00000001 ;PORTB0=1 JSR DELAY BCLR PORTB,%00000001 ;PORTB0=0 JSR DELAY BRA BACK ;Keep Toggling PB0, while waiting for Interrupt to come in ;---end of main program ;---PTH INTERRUPT SERVICE ROUTINE. Sound the buzzer for short period of time every time any of PTH goes from H-to-L PTH_ISR LDAA #5 STAA R4 ;how long the buzzer should sound OVER BSET PTT, %00100000 JSR DELAY BCLR PTT, %00100000 JSR DELAY DEC R4 BNE OVER LDAA #$FF ;Clear the PTH Interrupt flags for next round STAA PIFH ;Writing HIGH will clear the Interrupt Flag. RTI ;Return from ISR to main program ;----------DELAY DELAY PSHA ;Save Reg A on Stack LDAA #100 ; STAA R3 ; ;--1 msec delay. The Serial Monitor works at speed of 48MHz with XTAL=8MHz on Dragon12+ board ;Freq. for Instruction Clock Cycle is 24MHz (1/2 of 48Mhz). ;(1/24MHz) x 10 Clk x240x10=1 msec. Overheads are excluded in this calculation. L3 LDAA #10 STAA R2 L2 LDAA #240 STAA R1 L1 NOP ;1 Intruction Clk Cycle NOP ;1 NOP ;1 DEC R1 ;4 BNE L1 ;3 DEC R2 ;Total Instr.Clk=10 BNE L2 DEC R3 BNE L3 ;-------------- PULA ;Restore Reg A RTS ;------------------- ;************************************************************** ;* Interrupt Vectors * ;************************************************************** ORG $FFCC ;Vector table location for PTH interupt DC.W PTH_ISR ORG $FFFE DC.W Entry ;Reset Vector. CPU wakes here and it is sent to start of the code at $4000 ;Interrupt Programming with CodeWarrior on Dragon12+ with Real Time Interrupt (RTI) ;Buzzer sounds continuously while waiting for AN Interrupt ;PORTB.4 Toggle every Second using RTI (real time interrupt) ;Remember RTI uses the XTAL freq. (not the bus Freq) which is XTAL=8 MHz on Dragon12+ board ;MAKE SURE to choose "absolute" for memory model(NO relocatable) when creating porject for Interrupts ;Modified from example 11-18 by Mazidi & Causey ABSENTRY Entry ; for absolute assembly: mark this as application entry point ; Include derivative-specific definitions INCLUDE 'mc9s12dp256.inc' ;CPU used by Dragon12+ board ;----------------------USE $1000-$2FFF for Scratch Pad R1 EQU $1001 R2 EQU $1002 R3 EQU $1003 ORG $1200 TEMP DC.B 1 COUNT DC.B 1 ;code section ORG $4000 ;Flash ROM address for Dragon12+ Entry: LDS #$4000 ;Stack LDAA #$FF STAA DDRB ;MAKE PORTB AN OUTPUT PORT BSET DDRJ,%00000010 ;MAKE PORTJ1 AN OUTPUT PIN BCLR PTJ,%00000010 ;TURN OFF PORTJ1 TO ALLOW LEDs ON PORTB TO SHOW DATA BSET DDRT,%00100000 ;PTT5 as Output pin for buzzer ;INTERRUPT SET-UP FOR RTI BSET CRGINT,%10000000 LDAA #%01111111 ;longest RTI is about 0.13 sec Change this number to see toggling rate for RTI STAA RTICTL CLR TEMP CLR COUNT BSET DDRB,%00010000 ;Make PB4 and output CLI ;ENABLE INTERRUPTS GLOBALLY ;-------Sound the Buzzer at PTT5 forever and wait for interrupt BACK BSET PTT,%00100000 ;PTT5=1 JSR DELAY BCLR PTT,%00100000 ;PTT5=0 JSR DELAY BRA BACK ;Keep sounding buzzer ;--------------RTI INTERRUPT SERVICE ROUTINE. Toggle the PORTB4 every second RTI_ISR INC COUNT LDAA COUNT CMPA #8 ; 8 x 0.13 sec = 1 sec. Also change this number for shorter or long BNE OVER LDAA TEMP EORA #%00010000 STAA TEMP STAA PORTB CLR COUNT OVER BSET CRGFLG,%10000000 ;clear the RTI flag for next round RTI ;Return from RTI ISR ;----------DELAY DELAY PSHA ;Save Reg A on Stack LDAA #100 ;Change this value to hear STAA R3 ;different Buzzer sounds ;--1 msec delay. The Serial Monitor works at speed of 48MHz with XTAL=8MHz on Dragon12+ board ;Freq. for Instruction Clock Cycle is 24MHz (1/2 of 48Mhz). ;(1/24MHz) x 10 Clk x240x10=1 msec. Overheads are excluded in this calculation. L3 LDAA #10 STAA R2 L2 LDAA #240 STAA R1 L1 NOP ;1 Intruction Clk Cycle NOP ;1 NOP ;1 DEC R1 ;4 BNE L1 ;3 DEC R2 ;Total Instr.Clk=10 BNE L2 DEC R3 BNE L3 ;-------------- PULA ;Restore Reg A RTS ;------------------- ;************************************************************** ;* Interrupt Vectors * ;************************************************************** ORG $FFF0 ;Vector table location for RTI interupt DC.W RTI_ISR ORG $FFFE DC.W Entry ;Reset Vector. CPU wakes here and it is sent to start of the code at $4000