True / False Questions: 1. T/F - The ENIAC was the world’s first general purpose

Question

True / False Questions:
1. T/F - The ENIAC was the world’s first general purpose electronic computer built.



2. T/F - The fundamental building block of the ENIAC machine was transistors.

ANS:
3. T/F - Binary system was used to represent arithmetic in the ENIAC.

ANS: T/F - ENIAC was built primarily to help building the hydrogen bomb.

ANS:
5. T/F - The stored program concept is used in both ENIAC and Von-Neumann machines.
True

ANS:
6. T/F - The fetched instructions are stored in the Accumulator register.

ANS:
7. T/F - The next address calculation needs an accumulator.

ANS:
8. T/F - Interrupts are parts of the program that can cause the processor to stop.

ANS:
9. T/F - All interrupts are handled by the interrupt handler.

ANS:
10. T/F - Multiple interrupts cannot be handled by the processor.

ANS:

Multiple Choice Questions:

11. The type of addressing mode and operand information is obtained in which part of the instruction cycle?
A. Fetch B. Issue
C. Execute D. Decode

ANS :

12. The CPU system bus involves transfer of
A. Control B. Data
C. All of the above D. Instruction

ANS :

13. These registers are set during the execution of an instruction
A. Data registers B. Address Registers
C. Control D. Condition code

ANS :

14. This plays a key role during exceptions and procedure calls
A. Segment pointer B. Status register
C. Stack pointer D. None of the above

ANS :

15. The operating system executes certain privileged instructions by setting the
A. Privileged register B. Status Register
C. Supervisor bit D. Stack pointer

ANS :

16. Early microprocessors had an instruction cycle consisting of these stages
A. Fetch, Decode and Execute B. Fetch, Execute, Interrupt
C. Fetch, Decode, Write Back D. All of the above

ANS :

17. The location to store the address of the current instruction during an interrupt cycle is given by,
A. MAR B. Stack pointer
C. MBR D. None of the above

ANS :

18. In pipelining there is a requirement of this between stages
A. Memory B. Registers
C. Buffer D. None of the above

ANS :

19. This stage in a pipeline involves both reading and writing of operands
A. Fetch B. Decode
C. Execution D. Memory Write

ANS :

20. This type of instruction does not need a write back stage
A. Load B. Store
C. Add D. Multiply

ANS :

Explanation / Answer

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True / False Questions:
1. T/F - The ENIAC was the world’s first general purpose electronic computer built.
true


2. T/F - The fundamental building block of the ENIAC machine was transistors.
false - vacuum tubes
ANS:
3. T/F - Binary system was used to represent arithmetic in the ENIAC.
false- binary coded decimal
ANS: T/F - ENIAC was built primarily to help building the hydrogen bomb.
false - missle trajectories
ANS:
5. T/F - The stored program concept is used in both ENIAC and Von-Neumann machines.
True

ANS:
6. T/F - The fetched instructions are stored in the Accumulator register.
false
ANS:
7. T/F - The next address calculation needs an accumulator.
false
ANS:
8. T/F - Interrupts are parts of the program that can cause the processor to stop.
stop what it's doing and do something else-so technically true
ANS:
9. T/F - All interrupts are handled by the interrupt handler.
false ?
ANS:
10. T/F - Multiple interrupts cannot be handled by the processor.
multiple type -true?
ANS:

Multiple Choice Questions:

11. The type of addressing mode and operand information is obtained in which part of the instruction cycle?
A. Fetch B. Issue
C. Execute D. Decode

ANS :

12. The CPU system bus involves transfer of
A. Control? B. Data
C. All of the above D. Instruction

ANS :

13. These registers are set during the execution of an instruction
A. Data registers B. Address Registers
C. Control D. Condition code

ANS :

14. This plays a key role during exceptions and procedure calls
A. Segment pointer B. Status register
C. Stack pointer D. None of the above

ANS :

15. The operating system executes certain privileged instructions by setting the
A. Privileged register B. Status Register
C. Supervisor bit D. Stack pointer

ANS :

16. Early microprocessors had an instruction cycle consisting of these stages
A. Fetch, Decode and Execute B. Fetch, Execute, Interrupt
C. Fetch, Decode, Write Back D. All of the above

ANS :

17. The location to store the address of the current instruction during an interrupt cycle is given by,
A. MAR B. Stack pointer
C. MBR D. None of the above

ANS :

18. In pipelining there is a requirement of this between stages
A. Memory B. Registers
C. Buffer D. None of the above

ANS :

19. This stage in a pipeline involves both reading and writing of operands
A. Fetch B. Decode
C. Execution D. Memory Write

ANS :

20. This type of instruction does not need a write back stage
A. Load B. Store
C. Add D. Multiply

ANS :

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