A system is to have the following set of register transfers, implemented using b

Question

A system is to have the following set of register transfers, implemented using buses: Ca: R1 leftarrow R0. R2 leftarrow R1. R3 leftarrow R2. R0 leftarrow R3 Cb R3 leftarrow R4. R4 leftarrow R3 Cc: R0 leftarrow R4, R4 leftarrow R2 Cd R0 leftarrow R1 For each destination register, list all of the source registers. For each source register, list all of the destination registers. With consideration for which of the transfers must occur simultaneously, what is the minimum number of buses that can be used to implement the set of transfers? Assume that each register will have a single bus as its input (note: a bus might be the input of one or more registers. Draw a block diagram of the system, showing the registers, multiplexers, buses, and the connections between them.

Explanation / Answer

a)      The source registers for each destination register

R0 – R1, R3, R4

R1 – R0

R2 – R1

R3 – R2, R4

R4 – R2, R3

b)      Destination registers for each of the source registers

R0 – R1

R1 – R0, R2

R2 – R3, R4

R3 – R0, R4

R4 – R0, R3

The minimum number of buses that can be used is 4.

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