A computer system uses to levels of caches L1 and L2. Level L1 is accessed in on
ID: 3621599 • Letter: A
Question
A computer system uses to levels of caches L1 and L2. Level L1 is accessed in one clock cycle and supplies the data in case of an L1 hit. For an L1 miss, occurring 3% of the time, L2 is consulted. An L2 hit incurs a penalty of 10 clock cycles while an L2 miss implies a 100-cycle penalty.a) Assuming pipelined implementation with a CPI of one when there is no cache miss whatsoever (i.e., ignoring data and control dependencies), calculate the effective CPI if L2's local miss rate is 25%.
b) If we were to model the two-level cache system as a single cache, what miss rate and miss penalty should we use?
c) Changing the mapping scheme of L2 from direct to two-way set-associative can improve its local miss rate to 22% while increasing its hit penalty to 11 clock cycles owing to the more complex access scheme. Ignoring cost issues, is this change a good idea?
Explanation / Answer
(a) Effective CPI = Base CPI + Miss rate per instruction × Miss penalty Base CPI = 1 Miss rate of L2 = 25% = 0.25 Miss penality of L2 = 100 cycles Effective CPI = 1 + 0.25 x 100 = 1 + 25 = 25 clocks / instruction
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