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A computer consists of aprocessor and an I/O device D connected to main memory M

ID: 3617023 • Letter: A

Question

A computer consists of aprocessor and an I/O device D connected to main memory M via ashared bus with a data bus width of one word. The processor canexecute a maximum of 106 instructions per second. Anaverage instruction requires five machine cycles, three of whichuse the memory bus. A memory read or write operation uses onemachine cycle. Suppose that the processor is continuously executing“background” programs that requires 95% of itsinstruction execution rate but not any I/O instructions. Assumethat one processor cycle equals one bus cycle. Now suppose the I/Odevice is to be used to transfer very large blocks of data betweenM and D.

a) If programmed I/O is usedand each one-word I/O transfer requires the processor to executetwo instruction, estimate the maximum I/O data-transfer rate, inwords per second, possible through D.

Explanation / Answer

Dear User,                  Givendata:                The processor can execute a maximum number of instructions persecond = 106                  Thenumber of average instructions required machine cycles = 5                  Thenumber of average instructions required machine cycles = 5                 The processor is continuously executing “background”programs that requires its instruction                                                                                                                             execution rate =95%                  a)The processor can spend execution rate for I/O = (100-95)                                                                                          = 5%                  The maximum I/O instruction execution rate = 106*0.05                                                                                     =50,000 instructions per second                    TheI/O transfer rate = 50,000/2                                                   =25,000 words per second                 b)   The number ofmachine cycles available for DMA control                                                                        = 106 (0.05*5 +0.95*2)                                                                         =2.15 * 106               Ifwe assume that the DMA module can use all of these cycles, andignore any setup or status-checking time, then this value isthe maximum I/O transfer rate.                                                                        = 106 (0.05*5 +0.95*2)                                                                         =2.15 * 106               Ifwe assume that the DMA module can use all of these cycles, andignore any setup or status-checking time, then this value isthe maximum I/O transfer rate.                        I hope this will helps toyou
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