If I want to support the following instruction: store indexed $rd, $rs, $rt defi

Question

If I want to support the following instruction:

store indexed $rd, $rs, $rt

defined as M[$rs+$rd] = R[$rt].

what changes should I make to the provided processor so that it supports the instruction? Also what are the value of control signals?
Thank you!

PCSrc Add ALU result Add Shift left 2 RegWrite Instruction [25:21]Read Read MemWrite register 1 Read Instruction [20:16] Read data 1 PC address register 2 ALUSrc Zero MemtoReg Instruction [31:0] ALU ALUAddress dataM Read M Write Read Instruction Instruction (15:11 register data 2 result memory Write Data RegDst data Registers Write memory data Instruction [15:0] 16 32 Sign extend ALU control MemRead Instruction [5:0] ALUOp

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