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Problems: 1. How long will the following code fragment take to issue on an in-or

ID: 3592875 • Letter: P

Question

Problems: 1. How long will the following code fragment take to issue on an in-order superscalar processor with three execution units, where all instructions have latencies of 1 cycle and any execution unit can execute any instruction? LD r, (r2) SUB r4, r5, r6 ADD r3, r, r7 MUL r8, r3, r3 ST (r1), r4 ST (r12), r8 ADD rl5, r14, r13 SUB r10, rl5, r10 DIV r, r7, r3 SUB r3, r4, r8 OR r10,r7, r0 2. What is the longest chain of dependent operations (including name dependencies) in the code provided in problem 1? 3. How long the code fragment from problem 1 take to issue on an out-of-order superscalar processor with all other parameters the same as problem 1? Assume the instruction window of the processor is large enough to cover the entire code fragment and that the processor takes the greedy approach to issuing instructions. 4. What are the advantages and disadvantages of using VLIW processors in ILP?

Explanation / Answer

VLIW is sometimes viewed as the next step beyond the reduced instruction set computing ( RISC ) architecture, which also works with a limited set of relatively basic instructions and can usually execute more than one instruction at a time (a characteristic referred to as superscalar ). The main advantage of VLIW processors is that complexity is moved from the hardware to the software, which means that the hardware can be smaller, cheaper, and require less power to operate. The challenge is to design a compiler or pre-processor that is intelligent enough to decide how to build the very long instruction words. If dynamic pre-processing is done as the program is run, performance may be a concern.

The Crusoe family of processors from Transmeta uses very long instruction words that are assembled by a pre-processor that is located in a flash memory chip. Because the processor does not need to have the ability to discover and schedule parallel operations, the processor contains only about a fourth of the transistor s of a regular processor. The lower power requirement enables computers based on Crusoe technology to be operated by battery almost all day without a recharge.

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