Design a component “shifter” to implement the MIPS-32 instructions “sll” and “sr

Question

Design a component “shifter” to implement the MIPS-32 instructions “sll” and “srl” with the following entity description:

entity shifter is

port(X: in std_logic_vector(31 downto 0); SHAMT:in (std_logic_vector(4 down to 0);

         LR: in std_logic; - - LR=’0’ shifts left and LR=’1’ shifts right

          Y:out std_logic_vector(31 downto 0));

end shifter;

Note that the VHDL predefined functions “sll” and “srl” work only for the bit type and not the std_logic type. You will have to find another way to code them.

Explanation / Answer

.text #calculates sum of digits recursively SumDigits: sub $sp, $sp, 12 #alloocate 12B on stack sw $ra 0($sp) #save return address sw $a0, 4($sp) #save argument beq $a0, $0, exit_sumdigits #when there is no more digits return 0 rem $t0, $a0, 10 #get last digit sw $t0, 8($sp) #save it on stack div $a0, $a0, 10 #divide argument by 10 jal SumDigits #repeat procedure lw $t0, 8($sp) #read digit from stack add $v0, $v0, $t0 #add digit to previous result lw $ra, 0($sp) #load return address addi $sp, $sp, 12 #free stack jr $ra #return exit_sumdigits: li $v0, 0 #there are no more digits, return 0 lw $ra, 0($sp) #load return address addi $sp, $sp, 12 #free stack jr $ra #return main: li $a0, 75080 #load number in $a0 jal SumDigits #call SumDigits move $a0, $v0 #set a0 = result of SumDigits li $v0, 1 #set $v0 for print int system call syscall li $v0, 10 #set $v0 for exit system call syscall .data

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