1. Design problem and solve it involving all cache parameters such as: – Hit Rat
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Question
1. Design problem and solve it involving all cache parameters such as:
– Hit Rate = Hits / (Hits + Misses)
– Miss Rate = Misses / (Hits + Misses)
– I-Cache Miss Rate = Miss rate in the Instruction Cache
– D-Cache Miss Rate = Miss rate in the Data Cache
– I-Cache Miss Rate = 150 / 1000 = 15%
– D-Cache Miss Rate = 50 / (25% × 1000) = 50 / 250 = 20%
– Combined Misses = I-Cache Misses + D-Cache Misses
– I-Cache Misses = I-Count × I-Cache Miss Rate
– D-Cache Misses = LS-Count × D-Cache Miss Rate
– LS-Count (Load & Store) = I-Count × LS Frequency
• Define and explain each parameter.
Explanation / Answer
Hit rate: In a level when the address that an operation references is found in that level of the memory hierarchy is the hit and the percentage of references that reach the level that result in hits is known as Hit rate.
Miss rate: The percentage of refereces that reach the level that result in misses is known as miss rate.
Hit rate = 1 - miss rate. Since I-cache spatial locality is extremely high, the hit rate is likely to be
very high as well.
Cache miss is a state where the data sent for processing by a component is not found in the cache memory. It causes execution delays by requiring the program to gather the data from other cache levels or the main memory.
It occurs within cache memory access modes and methods. For every new request, the processor search the main cache to find that data. If the data is not found then it is a cache miss.
Instructions and data have different access patterns and different regions of memory. Having the same cache for both instructions and data may not always work. So, there are two caches- an instruction cache which only stores instructions, and a data cache that only stores data.
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