A microprocessor has an on-chip 2-way set associative cache with a total capacit
ID: 3576825 • Letter: A
Question
A microprocessor has an on-chip 2-way set associative cache with a total capacity of 8 KB. Each line in cache can store sixteen 8-bit words. It has a total addressable space of 16 MB. Consider the following CPU instruction; LOAD AB1234h Which set number will this request be stored in cache? What will be its corresponding tag number? If the microprocessor had a direct mapped cache with half the capacity of the set associative cache. Then, Which line number would the request be saved in? What will be the corresponding tag number? Now consider the case if the microprocessor had an associative cache with four times the capacity of the direct mapped cache. Which line number would the request be saved in? What will be the corresponding tag number? Which of the above caches will have the fastest access time. Justify your answer. Which of the above caches has the best overall performance considering replacement.Explanation / Answer
Load AB1234h
(a) Which set number will this request be stored in cache?
ANSWER ::
Number of the lines in set 'K' = 2
Total capacity of cache memory = 8 K Byte
Block size = 2w = line size = Sixteen 8 bit words = 16 bytes
Number of the sets 'V' = 2d = Total capacity /( K x line size) = 256
Total number of the addressable space = = 2 s+w= 16 M bytes
Address length = (s + w) bits = 24 bits
Thus, in main memory address ::
Size of set = d = 8 bits
Size of a word = w = 4 bits
Size of a tag = (s-d) bits = 12 bits
Therefore, Load AB1234h will store the result in the set number ::: 23 h
(b) What will be its corresponding tag number?
ANSWER :::
The corresponding tag number will be the ::: AB1 h
If the microprocessor had a direct mapped cache with half of the capacity of the set
associative cache.
(c) Which line number would the request be saved in?
ANSWER :::
If a microprocessor had a direct mapped cache with half of the capacity of the set of
two –way set associative cache, then it would have a capacity of the 4 kbytes &
effectively the same number of the lines as the number of the sets in the set associative
cache, i.e.
Number of lines in the cache = m = 2r = 256
Thus, in the main memory address ::::
Size of a line = r = 8 bits
Size of a word = w = 4 bits
Size of a tag = (s- r) bits = 12 bits
Therefore, Load AB1234h will store the result inline number :::: 23 h
(d) What will be the corresponding tag number ?
ANSWER ::::
The corresponding tag number will once again be the ::: AB1 h
Now consider the case if the microprocessor had associative cache with the four times the
capacity of the direct mapped cache.
(e) Which line number would the request be saved in?
ANSWER :::
In associative mapping any block can be stored in any line depending upon current
occupancy and the replacement algorithms. Thus, we can't say for sure which line
number the request will be saved in.
(f) What will be the corresponding tag number?
ANSWER :::
Address length = (s + w) bits = 24 bits
Thus, in the main memory address ::::
Size of a word = w = 4 bits
Size of a tag = s bits = 20 bits
Therefore, Load AB1234h will store result with a tag number :::::: AB123 h
(g) Which of the above caches will have the fastest access time. Justify your answer.
ANSWER :::
The direct cache will have the fastest access time, given a hit, i.e. the presence of
requested block in cache as only one comparison of tag will be determine whether the
requisite block is present (or) absent. Whereas, in associative memory one would have
to compare required tag with the all tags in the cache and in a set associative cache one
would have to compare required tag with all the tags in the set.
(h) Which of the above caches has the best overall performance considering replacement.
ANSWER :::
Of the three schemes of cache mapping techniques (Associative , Direct , Set-Associative) under consideration, ** Set-associative cache will have best overall performance considering the replacement. Access time from main memory is typical much larger than access time from the cache. Thus, if a situation where more than one block was alternatively required that mapped to same line number.
** Direct mapping would require us to overwrite blocks alternatively and this would be highly inefficient "thrashing". Associative mapping overcomes this but one has to go through entire cache comparing tags to search for a block.
** Set-associative cache requires a relatively short time to access a block because of one only checks for a required block by comparing the tags within a set usually of size 2 (or) 4 whilst avoiding the thrashing.
///*** Thank you ***///
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