Think about the difference between a latch and a flip-flop. Assume for these pro

Question

 Think about the difference between a latch and a flip-flop.  Assume  for these problems that the clock is low for 60% of the cycle and high for 40% of the cycle.  Assume also that any signal must be stable for 5% of  the clock in order for it to be read correctly. a) If I make a design that uses D latches to guard against unstable signals advancing through the circuit, for how much of the cycle do I need to have  the signal stable? b) If I, instead, use a D flip-flop, for how much of the cycle do I need to  have the signal stable? c) How much faster would the clock be if you used the flip-flops instead of  latches? 

Explanation / Answer

latches are level triggered and flip flops are edge triggered.

you didnt mention about the latch being pos level triggered or neg level triggered.

a) if pos lev triggered,

   then signal has to be stable for positive level time, i.e. 40%

   otherwise for neg lev triggered, it is 60%

b) for flipflops as they are edge triggered,

   signal needs to be stable for 5% (for the signal to be read) of the time just before the edge

c) whatever you use flip flop or latch minimum time for signal to be read would be 5% of the present time period. for latch clock has to be level for that minimum time. and for flip flop clock has to be level just before the edge for that minimum period of time. hence, clock speed would be same.

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