A maximum length sequence (MLS) is a type of pseudorandom binary sequence. They

Question

A maximum length sequence (MLS) is a type of pseudorandom binary sequence. They are bit sequences generated using maximal linear feedback shift registers and are so called because

        they are periodic and reproduce every binary sequence that can be reproduced by the shift registers (i.e.,

           for length-m registers they produce a sequence of length 2^m - 1).

           A MLS is also sometimes called a m-sequence

           A polynomial over GF(2) can be associated with

           the linear feedback shift register. It has degree of the length of the shift register, and has coefficients that are

           either 0 or 1, corresponding to the taps of the register that feed the xor gate.

           Assignment: Design LFSR circuit for the polynomial corresponding to x^4 + x + 1.

           Use 4'b1111 as initial value to run the simulation for 16 clock cycles of above LFSR.

           Show your simulation demo. Use Verilog.

Explanation / Answer

*****************************************CODE******************************************

module LFSR_16bt(

input clk,

output [0:3] LFSR_out);

reg [0:3] R = 4'b1111;

wire i,k,l,m,n;

assign k = R[3];

assign l = R[1];

assign m = R[2];

assign n = R[0];

assign LFSR_out = R;

assign i = (k&(~n))|((~k)&n) ;

always@(posedge clk)

begin

R[0] = i;

end

always@(posedge clk)

begin

R[1] = n;

end

always@(posedge clk)

begin

R[2] = l;

end

always@(posedge clk)

begin

R[3] = m;

end

endmodule

*****************************************Test Bench******************************************

module test_LFSR16bit;

// Inputs

reg clk;

// Outputs

wire [0:3] LFSR_out;

// Instantiate the Unit Under Test (UUT)

LFSR_16bt uut (

.clk(clk),

.LFSR_out(LFSR_out)

);

initial begin

// Initialize Inputs

clk = 0;

// Wait 100 ns for global reset to finish

#100;

clk = 1;

#100;

clk = 0;

#100;

clk = 1;

#100;

clk = 0;

#100;

clk = 1;

#100;

clk = 0;

#100;

clk = 1;

#100;

clk = 0;

#100;

clk = 1;

#100;

clk = 0;

#100;

clk = 1;

#100;

clk = 0;

#100;

clk = 1;

#100;

clk = 0;

#100;

clk = 1;

#100;

clk = 0;

#100;

clk = 1;

#100;

clk = 0;

#100;

clk = 1;

#100;

clk = 0;

#100;

clk = 1;

#100;

clk = 0;

#100;

clk = 1;

#100;

clk = 0;

#100;

clk = 1;

#100;

clk = 0;

#100;

clk = 1;

#100;

clk = 0;

#100;

clk = 1;

#100;

clk = 0;

#100;

clk = 1;

#100;

clk = 0;

#100;

// Add stimulus here

end

endmodule

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