So far I got I need to know how to get these parts circled in red below for the

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So far I got

I need to know how to get these parts circled in red below for the problem above

Problem 2. Design a block of RAM that is 4M x 8 using chips that are 512k x 8. The microprocessor this RAM is connected to has a 32-bit address bus, a REQUEST signal that is 0 when the processor is accessing memory, and zero otherwise. The processor also has a signal R / ?, that indicates whether the processor's access to memory is a read (1) or a write (0). The processor has an input, CoMPLETE sufficient wait states have elapsed. The processor clock is 8 ns, and the memory access time is 95 ns. The base address for the memory block should be 0xAEC00000. Show the design of the memory block including the base address decoding, all memory chips, memory chip select logic, and the timer circuit to drive the COMPLETE signal. which the memory system will set to 0 after

Explanation / Answer

For 3:8 Decoder:-

In the 3:8 decoder you have to always keep the enable signal at 1(or high) as you want your chip select signal to be active always as it should be working continuously. Now, you can do that using two methods either by directly connnecting the active high enable signal to +5 Volts and the active low signals to 0 Volts or you can use the unused lines remaining with you i.e., A22 - A31 as the states of these lines remain unchanged for this particular set of addressing you can convert them from Hexadecimal to binary and then observing which of the following are 0 and which are 1 and then putting a not gate to all the zeros thereby converting them into 1 and then using an AND gate to and all of them and as they are all 1 the NAND of them will also become 0 and hence you will get your enable signal(Which is active low as seen in your diagram as there is dash over the E). Now in this case as your address is AEC00000 and the unused lines are A22 - A31 The binary of them would be 1010 1110 11(A31 - A22). Hence you need to invert A24 ,A28 and A30 using not gates and then NAND all of them so as to get your Enable signal(or E1).

For 4-bit Counter:-

Now, for the timer part i think that you have to program it in such a way that it counts for 12 wait states and then again starts from 0. So to do that you will have to go from 0 to 11 as that would be 12 wait states. So to start with 0 we all the inputs as 0(or 0000 in binary) so when the counter loads it gives output as 0(or 0000 in binary) and then we connect the count to chip's enable signal as we need the timer to work only when our chip is selected or our decoder is selected and as the count is also active low enable like our 3:8 decoder enable signal we could connect it directly. The load is connected to the combinational circuit of the output of the 4-bit binary counter. So when the load gets enabled the count is masked or in other words it doesn't matter what the value of count is when the load is enabled and as the name suggests, the circuit loads the value of input on the output in our case 0000. So we need to enable the load whenever the output reaches a value of 11 which is 1011(in binary). As load is an active low terminal we will need to give it a 0 input to enable it. So, we will need a 0 as the output of the combinational circuit when 1011 output is reached from Q3 - Q0. So as you are using a NOR gate to get an zero output we need all the input to the gate as 1 as in 1011 only Q2 is 0 we will invert Q2 using a not gate and then connect it to the NOR gate while keeping all the other i.e., Q3,Q1,Q0 same. So when your count will reach to 11(or 1011) It will automatically be reseted to 0(or 0000).

Note:- Wherever i have kept bold handwriting i am reffering to the terminal and not the literal meaning of that word(in the 2nd part).

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