1 The control memory in Fig. 7.2 has 4096 words of 24 bits each. Mano 7.6 (a) Ho
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1 The control memory in Fig. 7.2 has 4096 words of 24 bits each. Mano 7.6 (a) How many bits are there in the control address register? 3 pointsl (b) How many bits are there in each of the four inputs shown going no the multiplexers? 3 pointsl (e) What are the number of inputs in each multiplexer and how many multiplexers are needed? 14 points] 2) Using the mapping procedure described in section 7.2, give the first microinstructions address for the following operation codes in decimal Show your work. [Mano 7.7 110 points] (a) 0010 (b) 1011 (c) 1111 3 Formulate a mapping procedure that provides for memory has 2048 words. each routine. The operation code has 6-bits and the control Show your work. [Mano 7.8] 10 points] 4) Assume that the input logic of the microprogram sequencer of Fig. 7.8 has for inputs I, h, 10. T(test-and three outputs S, S. . and L. The operations that are performed in the unit are listed in the following table. Design the input logic circuit using a minimum number of gates. [Mano 7.22] 130 points 0 0 Increment CAR if T-1, ump to AD if T- x 0 1 Jump to AD 1 0 Increment CAR 0 1 Jump to AD if T-1, increment CAR ifT-0 0 | Return from subroutine Map external address uncondition Call subroutine if T=1, increment CAR if T-0 0 1 1Explanation / Answer
1)
a) The size of memory is 4096 words = 212 of 24 bits each.
The only input to control memory is through control address register.
And the size of memory is already given, So there are 12 bits in control address register.
b) There are 12 bits in each of the four inputs shown going to the multiplexer.
c) There are 4 inputs going into each multiplexer and there are 12 multiplexer.
i.e, 12 multiplexer and each of size 4 to 1 .
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