3. You are designing a cash register system that will display dollar amounts owe

Question

3. You are designing a cash register system that will display dollar amounts owed and change due up to a value of $9999.99 Assuming the dollar sign is simply a sticker beside the display and the numbers are to be shown using 7-segment displays, how many displays will you need? a. b. To reduce the number of wires required by the display, you design the system based on time division multiplexing where only one 7-segment display is on at any moment in time. What is the minimum frequency required such that the eye doesn't see the display updating? c. To generate the frequency found in 3.b, you will use cascaded clock dividers similar to homework 3 problem 3. Assume you have three mclk frequencies available for use: 50 MHz, 737.28 kHz, and 8.8127 kHz. Also, U1 and U2 are 8-bit clock dividers. Select an mclk, i, and j value that will produce a clk2 frequency as close as possible to the value found in 3.b U1 dk alil clr U2 cl qlil clr clk1 mclk clk2 clr-

Explanation / Answer

a) Since, the dot can be displayed along with the ones place in the 4 digit value, you will need 6 seven-segment displays.

b) The minimum frequency required such that the eye doesn't recognize the display updationg is the flicker fusion threshold. Normal adult Critical flicker frequency reportedly is around 36 to 39 Hertz. (Reference: http://www.ijraset.com/fileserve.php?FID=2523). There are also cases, which goes upto 50Hz. In some cases, it is reported to be 60 Hz or even 120 Hz. (Reference: Cells in the relay between the eye and the brain through which the visual signal is forwarded responds to higher temporal frequencies than 60 Hz (Spekreijse et al. 1971). That means that the signal is available but somehow it isn’t available to consciousness. Cells in the visual cortex appear to discard the high-frequency information. The 120 Hz flicker of older fluorescent lights has been found to cause cognitive deficits and headaches (Veitch and McColl 1995).)

c) In our case, let us take 36-50 Hz. In this part, we need to generate this frequency using the existing mclk frequencies.

There are 3 available frequencies, 50MHz, 737.28 kHz, 8.8127 kHz.

8-bit clock divider gives a maximum of 2^8 = divide by 256

737.28kHz / 20480 = 36 Hz

But 20480 doesn't have proper binary equivalent. Nearest is:-

2^8 * 2^6 = 16384

737.28kHz / 16384 = 45 Hz which is an acceptable flicker rate.

mclk=737.28kHz

i =8

j=6

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