Last name: First name: abe123: 4, (20%) In MIPS branch instructions, the branch

Question

Last name: First name: abe123: 4, (20%) In MIPS branch instructions, the branch target address (BTA) is given by: BTA Iw anch targer address where PC is the address of the branch instruction and Signlmm is the 16-bit immediate field. (1) (10%) why does the immediate field need to shift tothe left by 2bits before being added to PC+4? (2). (10%) Consider the below MIPS code snippet with instruction addresses: 0xA4 OxA8 OxAC OxB0 DONE: addi beq addi addi Sto, SO, DONE SvO, $0, I Ssp, Ssp, 8 Sa0, Sa0, -I As specified, the PC of beq is oxA4, and its branch target adress is OxB0. What is the immediate field of the beq instruction? it can be implemented using: nor Sto, Sto, S0 the nori instruction is also not a MIPS instruction, because it can be implemented with tv other MIPS instructions. Write the two instructions to implement: Sto, St0, 0x 1234 nori

Explanation / Answer

1.) first let us note that all the addresses at which the program will be loaded into the memory are always a multiple of 4.

then the distance between any two instructions is always a multiple of 4 .

Now the immediate in the Branch instruction is almost the distance from the branch instruction to the instruction that is the target of the instruction.

therefore the distance = always 4's multiple

from the fig given below,

the binary representation of multiple of 4 ends with 00. (ie last two bits is always 00)

If the distance is always ending in 00.then why do we need to store that 00 in the instruction. if we omit it, we can effectively get a 18-bit distance at run time.(ie. the conditional branch instruction can branch to farther distances )

that is , if we shift the immediate value left by 2 (ie. multiply by 4) we get 8 which is added to the address PC+4 to get the target address .

This reduces the computational time in finding the difference of the two registers. this time can be used to do some useful things like calculation PC+4.

2.)   as specifed above , the PC+4 is added with the immediate value (multiplied by 4) to get the target address.

now PC address is 0xA4

we get PC+4 address = 0xA4 +4 = 0xA8

target address = 0xB0

target address - PC+4 address = 0xB0 - 0xA8

difference = 8

/ by 4

= 2

there fore the immediate value is to shifted to left by 2 bits

immediate in instruction = 0000 0000 0000 0010 or 0x02

5.) since the NORI instruction is not available in the MIPS code,

the function of NORI is implemented using two other MIPS Instructions namely ORI and NOR

NORI $t0,$t0,0x1234

is equivalent to

ORI $t1,$t0,0x1234

NOR $t0,$t1,$t0

ie first OR ing it with the given immediate value and then NOR ing it with previous result.

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