For embedded system, give an example for each of the seven addressing modes. Als
ID: 2247982 • Letter: F
Question
For embedded system, give an example for each of the seven addressing modes. Also show the system state in registers/memory maps before and after you give the instruction command.
1. Register Address Mode
2. Indexed Address Mode
3. Symbolic Address Mode
4. Absolute Address Mode
5. Immediate Address Mode
6. Indirect Address Mode
7. Indirect- Autoincrement
Show instruction, previous state and after state of the system for each.
YOU HAVE TO USE ALL OF THE FOLLOWING INSTRUCTIONS ONCE: ADD, MOV, JMP, SUB, DEC, INC, PUSH.
Example, for an indirect register address mode: instruction is @R6, R5.
Before State: R5 = 0X1234 , R6 = 0X200, M[0X200]= 0X4321
After State: R5= 0X5555, R6= 0X200, M[0X200]=0X4321
Explanation / Answer
1)Register Address Mode
In this addressing mode, we use the register name directly (as source operand). Let us try to understand with the help of an example.
At a time, the registers can take values from R0 to R7. There are 32 such registers. In order to use 32 registers with just 8 variables to address registers, register banks are used. There are 4 register banks named from 0 to 3. Each bank comprises of 8 registers named from R0 to R7.
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2)
Indexed Addressing Mode
We will take two examples to understand the concept of indexed addressing mode. Take a look at the following instructions
MOVC A, @A+DPTR
and
MOVC A, @A+PC
where DPTR is the data pointer and PC is the program counter (both are 16-bit registers). Consider the first example.
The source operand is @A+DPTR. It contains the source data from this location. Here we are adding the contents of DPTR with the current content of the accumulator. This addition will give a new address which is the address of the source data. The data pointed by this address is then transferred to the accumulator.
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3)Symbolic Address Mode
Symbolic type whose name conveys the meaning of the type rather than its physical extent, such as:
typedef unsigned int special_register;
Special registers are actually volatile entities — they may change state in ways that the compiler can't detect. Therefore, the typedef should be an alias for a volatile-qualified type, as in:
typedef unsigned int volatile special_register;
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4)Absolute Address Mode
Absolute uses absolute addresses, jump to this exact address, read from this exact address. If equal then branch to 0x1000.
The assembler doesnt do this the compiler and or programmer does. Generally, eventually, compiled code will end up having absolute addressing, in particular if your code consists of separate objects that are linked together.
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5)
Immediate Addressing Mode
Let's begin with an example.
In general, we can write,
It is termed as immediate because 8-bit data is transferred immediately to the accumulator (destination operand).
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6)Indirect Address Mode
The effective address of the operand is the contents of a register or main memory location, location whose address appears in the instruction. Indirection is noted by placing the name of the register or the memory address given in the instruction in parentheses. The register or memory location that contains the address of the operand is a pointer. When an execution takes place in such mode, instruction may be told to go to a specific address. Once it's there, instead of finding an operand, it finds an address where the operand is located.
NOTE:
Two memory accesses are required in order to obtain the value of the operand (fetch operand address and fetch operand value).
Example: (textbook) ADD (A), R0
(address A is embedded in the instruction code and (A) is the operand address = pointer variable)
Example: SPIM - simulating pointers and indirect register addressing
The following "C" code:
could be translated into the following assembly code:
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7)Indirect- Autoincrement
(or register indirect with postincrement) mode: like the register indirect, except that the content of the register is incremented after the use of the address.This mode offers automatic address increment useful in loops and in accessing byte, half-word, or word arrays of operands.
load Reg1,(Reg2)+
Reg1 <-- Mem[(Reg2)], Reg2 <-- (Reg2) + step
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