A course project is required for this course and will count 15% towards your ove
ID: 2085113 • Letter: A
Question
A course project is required for this course and will count 15% towards your overall course grade. You are encouraged to find a partner and form a team. A project demo is due by 4PM on Thu, Aug 10, 2017. A project report is due on Fri, Aug 11, 2017. In this project, you will use the Altera DE2-115 board, Quartus II software, and VHDL to design a dice game. In this game, two players take turns to roll a simulated dice and whoever has a bigger number wins. The requirements are as follows: 7-segment displays Hex 7 and Hex 0 are used to display Player 1 and Player 2's numbers, respectively. In the initial state when the board first boots up, number zero should be displayed on both 7-segment displays and no LEDs should be turned on. Key 2 and Key 1 are the roll buttons of Player 1 and Player 2, respectively. When either button is pressed, a random number bet segment display. Note that the number has to be truly random, i.e., no patterns are allowed. After both players have rolled the dice, an LED should be turned on to indicate the winner (the one who has larger number). In particular, LEDR17 represents Player 1 and LEDR6 represents Player 2. Note that no LEDs should be turned on before BOTH players have rolled the dice. If there is a tie, then neither LED should be turned on. Key0 is the reset button. When pressed, it should reset the system to the initial state and allow another round of the game to begin.Explanation / Answer
VHDL Code:
library ieee;
use ieee.math_real.all;
entity game is
PORT
(
ky_0,ky_1,ky_2 : IN STD_LOGIC ;
LED_out1,LED_out2 : OUT STD_LOGIC ;
Seven_Segment : OUT STD_LOGIC_VECTOR(7 DOWNTO 0)
};
end game;
architecture behavior of game is
signal rand_num : integer := 0;
signal plyr_won : integer := 0; -- 0 if tie ,1 if player 1 wins, 2 if player 2 wins
signal dic_out1,dic_out2 : integer := 0; -- randm signal generate
begin
process(ky_0,ky_1,ky_2)
variable fst_plyd : BIT := 0;
variable seed1, seed2: positive;
variable rand: real;
variable range_of_rand : integer := 5;
begin
if(ky_0 = '1')
dic_out := 0;
plyr_won := 0;
fst_plyd : = 0;
LED_out1 <= 0;
LED_out2 <= 0;
else if (ky_1 = '1' )
uniform(seed1, seed2, rand);
rand_num := integer(rand*range_of_rand) + 1; -- 0 to 6 randome value generated here
dic_out1 := rand_num;
case fst_plyd is
when '0' =>
fst_plyd := 1;
when '1' =>
fst_plyd := 0;
end case
else if (ky_2 = '1' )
uniform(seed1, seed2, rand);
rand_num <= integer(rand*range_of_rand) + 1; -- 0 to 6 randome value generated here
dic_out2 := rand_num;
case fst_plyd is
when '0' =>
fst_plyd := 1;
when '1' =>
fst_plyd := 0;
end case
end if;
case rand_num is
when "1"=> Seven_Segment <="1001111"; -- '1'
when "2"=> Seven_Segment <="0010010"; -- '2'
when "3"=> Seven_Segment <="0000110"; -- '3'
when "4"=> Seven_Segment <="1001100"; -- '4'
when "5"=> Seven_Segment <="0100100"; -- '5'
when "6"=> Seven_Segment <="0100000"; -- '6'
when others=> Seven_Segment <="1111111";
end case;
if(fst_plyd = '1')
if(dic_out1 < dic_out2)
LED_out1 <= 0;
LED_out2 <= 1;
else if(dic_out1 > dic_out2)
LED_out1 <= 1;
LED_out2 <= 0;
else
LED_out1 <= 0;
LED_out2 <= 0;
end if;
end process;
end behavior;
Related Questions
drjack9650@gmail.com
Navigate
Integrity-first tutoring: explanations and feedback only — we do not complete graded work. Learn more.