The ALU has 3 control inputs: M for mode selection, S1, S0, for operation select
ID: 2083179 • Letter: T
Question
The ALU has 3 control inputs: M for mode selection, S1, S0, for operation selection, carry-in input C0. It also has two 4-bit numbers A and B, and 4-bit result and 1-bit carry-out output. A block diagram with all inputs and outputs are shown in Figure 4.1.
Figure 4.1. Input/output of ALU
The logic result is sent to the LEDs and the arithmetic result is sent to 7-segmetn display.
The detailed functions of the ALU are described in the following table.
Control Inputs
Operation
M C0
S1 S0
0 x
0 0
AND
0 x
0 1
OR
0 x
1 0
XOR
1 0
0 0
Addition
1 0
0 1
Subtraction
1 1
1 0
Increment A by 1
1 1
1 1
Increment B by 1
2. Questions
Write your program
Create a constraints file.
Draw schematic.
Control Inputs
Operation
M C0
S1 S0
0 x
0 0
AND
0 x
0 1
OR
0 x
1 0
XOR
1 0
0 0
Addition
1 0
0 1
Subtraction
1 1
1 0
Increment A by 1
1 1
1 1
Increment B by 1
Carry in Co Cout Data in A13:0 Data in B 3:0 4-bit ALU Operation S1 F select so Mode select M Carry out Data output F[3:0]Explanation / Answer
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
-- Uncomment the following lines to use the declarations that are
-- provided for instantiating Xilinx primitive components.
--library UNISIM;
--use UNISIM.VComponents.all;
entity alu4 is
Port ( r : in std_logic_vector(15 downto 0);
w : in std_logic_vector(15 downto 0);
d : in std_logic_vector(3 downto 0);
f : out std_logic_vector(15 downto 0));
end alu4;
architecture alu3 of alu4 is
begin
process(r,w,d)
begin
case d is
when "0000"=>
f<= w and r;
when "0001"=>
f<=w or r;
when "0010"=>
f<=w nor r;
when "0011"=>
f<=w xor r;
when "0100"=>
f<=w xnor r;
when "0101"=>
f<=w nand r;
when "0110"=>
f<=not r;
when "0111"=>
f<=w + r;
when "1000"=>
f<=r - w;
when "1001"=>
f<=r+"0000000000000001";
when "1010"=>
f<=w-"0000000000000001";
when "1011"=>
f<=r;
when others =>
f<="0000000000000000";
end case;
end process;
end alu3;
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