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question 6 only What is testing? Why do we need it? What are the four classes of

ID: 2079111 • Letter: Q

Question

question 6 only

What is testing? Why do we need it? What are the four classes of errors that can occur in a digital system? For each class, give an example. What is the difference between a physical fault and a logical fault? Give an example that illustrates the |difference. Briefly explain what the following terms mean: On-line testing Stored-pattern testing Algorithmic testing DC testing At-speed testing Compact testing Guided-probe testing Self-testing Fault Coverage Fault Universe Problem 2.1, 2.2 from the textbook What is a non-procedure RTL language and why do we need it? Problem 3.1, 3.3 from the textbook What is the difference between transport and inertial delays? Illustrate with an example.

Explanation / Answer

1. Testing: Is used at key checkpoints in the overall process to determine whether objectives are being met.Testing is really required to point out the defects and errors that were made during the development phases. It's essential since it makes sure of the Customer's reliability and their satisfaction in the application.

2. An error occurs when a bit is altered between transmission and reception: Single bit errors, One bit altered,Adjacent bits not affected,White noise,Burst errors,Length B,Contiguous sequence of B bits in which first last and any,number of intermediate bits in error,Impulse noisE,  Fading in wireless,Effect greater at higher data rates.

3. A) Online Testing: system will have to connect with the internet or other systems to exchange the information. So it's all about what will be happen when System is online (Connect to the internet or other applications/systems via specific communication protocol).

B)A stored-pattern logic self-test system includes a memory, a device under test and a test controller. The memory stores test pattern data.

c)Algorithm testing: testing of algorithm which is a a small procedure that solves a recurrent problem in software world.

d)DC testING IS used mainly to do “pressure tests” on high voltage cables. ... DC test sets usually consist of half wave rectification, using HV selenium rectifiers.

E) In at-speed testing, launch will happen at hips frequency, but capture will be at slower rate. at-speed testing will give more about transitions, rise, fall and other speed effecting defects.

F) COMPACT TESTING IS TESTING OF THING to consolidate it and remove any voids, thereby increasing the density and consequently its load-bearing capacity.

G)Test probes are used TO TEST IN GUIDE PROBE TESTING in businesses and industries all over the world, and they are valuable for countless applications. Some are used to test food temperatures .

H) SELF TESTING : Automatic test(s) performed by a device (such as a computer or printer) upon itself when switched on, to detect any malfunction, a missing component, or a change in its configuration

I)Fault coverage refers to the percentage of some type of fault that can be detected during the test of any engineered system.

J)

In inertial delay ,the spikes are not propagated to the output whereas in transport delay the spikes are propagated to the output. Usually inertial delays are used for component delays , while transport delay for interconnect delays.

Inertial delay
I/p pulse that do not exceed the propagation delay of the gate do not propagate to the O/P

Transport delay
It's the time taken by signal to propagate through a net ie through wire also known as time of flight

Inertial delay is like the inertia of the signal, i.e. the time it takes to generate signal from the gate after i/p is provided

And Transport delay is related to transportation, i.e. the time needed in transportation of signal, from o/p of one gate to the i/p of another gate.

Inertial delay models only propagate signals to an output after the input signals have remained unchanged
(been stable) for a time period equal to or greater than the propagation delay of the model. If the time between two
input changes is shorter than a procedural assignment delay, a continuous assignment delay, or gate delay, a
previously scheduled but unrealized output event is replaced with a newly scheduled output event.
Transport delay models propagate all signals to an output after any input signals change. Scheduled output
value changes are queued for transport delay models.

reject setting.
For most Verilog simulators, reject and error settings
are specified as a percentage of propagation delay in
multiples of 10%.
Pure inertial delay example using reject/error switches.
Add the Verilog command line options:
+pulse_r/100 +pulse_e/100
reject all pulses less than 100% of propagation delay.
Pure transport delay example using reject/error switches.
Add the Verilog command line options:
+pulse_r/0 +pulse_e/0
pass all pulses greater than 0% of propagation delay.