Define and describe the difference between the Mealy and Machines models of Fini
ID: 2072829 • Letter: D
Question
Define and describe the difference between the Mealy and Machines models of Finite state Machines. T or F: Shift registers, counters, and register files are all examples of combinational circuits. Microprocessors can be divided into two broad categories, advantage and one disadvantage of each category. Please list both of these categories and one Please list the three required components of any finite state machine. What are the three levels/methods of describing a circuit in VHDL? Please list an advantage of each. Please list the three minimum states that most general purpose processors will have.Explanation / Answer
1. Mealy machine is a finite state machine whose output is determined by current state and current input. Moore machine is one whose output value is only determined by its current state.
Differences
Moore Machine
(i) Requires more state
(ii) Output changes at clock edge
(iii) A counter is a Moore machine
Mealy Machine
(i). Requires less states for the same task
(ii). Reacts faster to the input, does not need to wait for clock
(iii).Counter is not a Moore machine
2. False. Shift Register, counters are all sequential circuits
3. Microprocessor can be classified into two categories on basis of their hardware architecture
(i) CSIC (complex instruction set computer)
(ii) RSIC (reduced instruction set computer)
Advantage and Disadvantage of RISC
~ Advantage is that they are easier to implement and fewer transistor count with faster clock Speeds
~ Disadvantage is that program code size increases because of the reduced instruction set
Advantage and Disadvantage of CISC
~ Advantage is that lesser program code-size with simpler compilers. It is mainly used in Desktop and Servers.
~ Disadvantage is that it consumes more power and complicated to implement
4. Any finite state machine requires the following three
(i) register to store state variables
(ii) A block of Combinational logic for determination of the state transition
(iii) Another block of combinational logic for determining the output of FSM
5. The three different ways of describing a circuit in VHDL are
(i) Behavioural modeling - advantage is that its is easier to code
(ii) Data flow modeling - Advantage is that flow of data can be seen. It is easier to construct by seeing the diagrams constructed.
(iii) Structural modeling - Advantage is that parallel development of circuit is possible. It means that different teams can work on development and testing of sub circuits modules and the combine them later to form the whole circuit
6. The three minimum states in most general purpose processor are
(i) HIGH (1)
(ii) LOW (0)
(iii) High impedance state (z)
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