3) As mentioned previously, the ring oscillator is a circuit consisting of an od

Question

3) As mentioned previously, the ring oscillator is a circuit consisting of an odd number of inverters connected together, where the output of the last inverter is fed back to the input of the first. The circuit, shown below, generates a square wave clock output.

a) Assuming the inverters have identical delay parameters, write the expression that defines the clock frequency in terms of each inverter delay (tp) and the number of stages (inverters) in the oscillator (n). Note: it is recommended to start with a timing diagram of the 3 inverter circuit (n = 3), drawing the signal after each inverter. Then the clock frequency can be derived from observation of this timing diagram.

b) Clock signals generated from ring oscillators are susceptible to significant amounts of absolute clock jitter due to process parasitics, temperature variation, etc. As discussed, jitter can be expressed as a zero-mean random variable. In this case, assume there is an uncorrelated jitter contribution from each stage of the ring oscillator with expected value 0 and standard deviation ?. For simplicity, we will assume the worst case (absolute jitter) as equal to ±?. Derive an expression for the ratio of tjitter to clock period of the ring oscillator circuit. Note: from probability theory, adding n number of independent, identically distributed random variables of
standard deviation ? results in a standard deviation of ?. It is OK to approximate that the clock period is large compared to the jitter (i.e. T + 2*tjitter ? T)

c) Explain the design tradeoff for the ring oscillator in terms of number of stages. What metrics improve/degrade as n increases?

Explanation / Answer

a)

In one cycle, clock goes from 1 to 0 to 1.

In going from 1 to 0, time required is n * Tp.

In going from 0 to 1, time required is n * Tp.

Thus, time Period Of Clock Is 2 * n * Tp.

Frequency Is 1/(2 * n * Tp)

2)

Standard deviation of sum of n independent normal variables is sqrt(n) * sigma

Therefore, Tjitter = sqrt(n) * sigma

Tclock = 2 * n * Tp

Tjitter / Tclock = sigma / (2 * sqrt(n) * Tp)

c)

As we increase n, the ratio Tjitter/Tclock decreases. Hence, we get output with less relative noise.

However, as we increase n, frequency of clock decreases, which is a disadvantage.

Hence, the trade-off is between frequency and relative noise.

Related Questions

Navigate

• Browse (All)
• Browse 3
• Subjects

Integrity-first tutoring: explanations and feedback only — we do not complete graded work. Learn more.