It is required to produce a clock with 1 Hz frequency using two cascaded 10-bit
ID: 1846315 • Letter: I
Question
It is required to produce a clock with 1 Hz frequency using two cascaded 10-bit counters. the three master clock mclk frequncies available to you are 50 MHZ , 1.05 MHZ, 8.8127 kHz. you also have all outputs of the two 10-bit counters available for use. Use any one of the three mclk frequencies, any output i of the counter U1 and any output j of the counter U2 to design the logic circuit as shown below in order to realize an output frequency of most accurate 1Hz clock.
mclk=? i=? j=?
Explanation / Answer
the T flip flop is known as frequency divider, where the clock frequency of the 'T' flip is F means, and the input is high, then the ouput of F/2.
for better understand let we take 4 bit T-flipflop counter(all flip flop counter is applicaple),then the 1st bit ouput will divide the clock freq by 2,2nd flipflop output will divide further by 2 so total by 4, 3rd result by 8 and 4th result by 16.
so the 4 bit counter divide the clock freq by 16.in common the counter will divide the clock frequency 2^n, where n is the no of input of the counter.
if we choose 1.05 MHZ,1500hz, if we wrie in terms of 2^n, then 2^10=1048hz,.. whic is normalizes to 1.05 mhz.
here, we using two parralel 10bit counter i and j.
to get 1hz clk output we must tak output from U1 counter ,qi(10) the pin and choose 1.05Mhz as master clock frequency
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