An arithmetic and logic unit is a combinational logic circuit capable of perform

ID: 1846126 • Letter: A

Question

An arithmetic and logic unit is a combinational logic circuit capable of performing several

arithmetic and logic functions, selected by a set of function-select inputs, on a pair of nbit

operands. In this experiment you will use the 74LS181, which is a 4 bits ALU and

you will design the two circuit described below.

The circuit is composed of two parts. The first parts has as inputs two switches from the

trainer and it generates the signals to be used by the ALUs to select the operations

defined in the table given below. The second part of the circuit are the ALUs

themselves, and they require inputs from the selector circuit and data to be operated

upon. This circuit generates outputs to be displayed in the logic monitor.

Assume A = 11110000B and B = 10010110B. These values can be wired directly to the

74LS181

1. to make a comparator out of it we can use the substraction option.

a..as we know if A>B, then A-B > 0 and in binary this means the MSB of the resulted subtraction will be 0.

b.. similarly if A<B then A-B < 0 and in binary this means the MSB of the resulted subtraction will be 1.

so we can always use F == 01 and track the MSB of the out put

if S[3] == 0 then A>=B

if S[3] == 1 then A<B.

to make a 8 bit comparator use two 74LS181.

use first one for the higher nibble comparison and lower nibble for the other.

suppose the MSB of the first 74LS181 is Sh and MSB of the second 74LS181 is Sl. then the comparator operation can be written as

if Sh^ Sl^ = 0 then A < B

if Sh^ Sl^ = 1 ten A>= B

here ^ refers to the complement operation. this is simply a nor operation which can be done by C-MOS design which will require 4 transistors.

the pull networks will take two parallel input and the push network will tahe series input.

Integrity-first tutoring: explanations and feedback only — we do not complete graded work. Learn more.