In VHDL code, given the methods (below) for calculating 8-bit parity, write a VH

Question

In VHDL code, given the methods (below) for calculating 8-bit parity, write a VHDL program that MAXIMIZES CONCURRENCY (dataflow) for parity calculation of 1024 bits. The given methods would not maximize concurrency if extended out to 1024 bits because in each case is completely dependent on each and every bit previous.

--Parity Architecture 1--

ARCHITECTURE parity_dataflow OF parity IS
SIGNAL xor_out: std_logic_vector (7 downto 1);

BEGIN
xor_out(1) <= parity_in(0) XOR parity_in(1);
xor_out(2) <= xor_out(1) XOR parity_in(2);
xor_out(3) <= xor_out(2) XOR parity_in(3);
xor_out(4) <= xor_out(3) XOR parity_in(4);
xor_out(5) <= xor_out(4) XOR parity_in(5);
xor_out(6) <= xor_out(5) XOR parity_in(6);
xor_out(7) <= xor_out(6) XOR parity_in(7);
parity_out <= xor_out(7);

END parity_dataflow;


--PARITY: Architecture 2 (For – Generate)--

ARCHITECTURE parity_dataflow OF parity IS
SIGNAL xor_out: std_logic_vector (7 downto 1);

BEGIN
xor_out(1) <= parity_in(0) XOR parity_in(1);
G2: FOR i IN 1 TO 6 GENERATE
xor_out(i+1) <= xor_out(i) XOR parity_in(i+1);
end generate G2;

parity_out <= xor_out(7);
END parity_dataflow;

--PARITY: Architecture 3--

ARCHITECTURE parity_dataflow OF parity IS
SIGNAL xor_out: STD_LOGIC_VECTOR (7 DOWNTO 0);

BEGIN
xor_out(0) <= parity_in(0);
G2: FOR i IN 0 TO 6 GENERATE
xor_out(i+1) <= xor_out(i) XOR parity_in(i+1);
end generate G2;
parity_out <= xor_out(7);

END parity_dataflow;

-----------------------------------
How to Improve Performance
To calculate parity of 1024 bits. Objective: to maximize concurrency.

Explanation / Answer

For maximizing concurrency, we can write a PROCEDURE for calculating 8-bit parity and then call this PROCEDURE 128 times.

This is the program:

ARCHITECTURE parity_dataflow OF parity IS

SIGNAL xor_out: STD_LOGIC_VECTOR (7 DOWNTO 0);
SIGNAL Parity_in: std_logic_vector (1023 downto 0);

SIGNAL Parity_in_8bit: std_logic_vector (7 downto 0);

SIGNAL Parity_out_temp:std_logic_vector;

SIGNAL Parity_in_count,Parity_in_count_prev:integer;
    Procedure Parity_8_bit (Parity_in_prdre:in std_logic_vector (7 downto 0);

                                    Parity_out_prdre :out std_logic) is

    variable parity_out_temp:std_logic;

   BEGIN
       xor_out(0) <= Parity_in_prdre(0);
       G2: FOR i IN 0 TO 6 GENERATE
       xor_out(i+1)< = xor_out(i) XOR Parity_in_prdre(i+1);
       end generate G2;
       Parity_out_temp := xor_out(7);

       Parity_out_prdre<=Parity_out_temp;

    end Procedure Parity_8_bit;

BEGIN

parity_out<=0;

Parity_in_8bit<=Parity_in[7:0];

Parity_in_count<=8;

   for i in 1to 128 loop

   Parity_8_bit(Parity_in_8bit,Parity_out_temp);

   parity_out <=parity_out XOR Parity_out_temp;   

Parity_in_count_prev<=Parity_in_count;

Parity_in_count<=Parity_in_count_prev + 8;

Parity_in_8bit<=Parity_in[Parity_in_count-1:Parity_in_count_prev ];

   end loop;

END parity_dataflow;

What I have done is , I have calculated parity for 8 bits in a procedure and then I called the procedure 128 times and each time I have XORed the previous output with the current output. I have initialized parity_out to 0 so that XOR ing for the first time will keep the output the same.

First I have taken bits from 7 downto 0. and then I have stored initial value of 8 in a temp variable and then every time I called the procedure I have added 8 to the previous value and then I have called the procedure for elements from 16-1 =15 down to 8(previous variable) and then repeated the procedure within the loop.

I think this will solve your problem.

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