A CMOS circuit includes a pairof N-doped regions, separated by a P-doped channel

Question

A CMOS circuit includes a pairof N-doped regions, separated by a P-doped channel, as well asP-doped regions, separated by an N-doped channel. Althoughthis forms PNP and NPN transistors, the bias of the regions isdesigned so the junctions are reverse biased and the electric fieldeffects on the channel are supposed to control the MOS-FETtransistors operations. There is a failure mode of a CMOScircuit where the bias conditions are violated. What is thefailure mode, what causes it, what effects does it cause, and whatis the simplest recovery mechanism.

Explanation / Answer

It causes hysteresis in the operating point.
When the substrate (body) is not biased properly withrespect to the body in both the NMOS and PMOS, there is a substratecurrent and it forces the n-channel threshold voltage into thedepletion mode (threshold voltage becomes negative) . To preventthis condition there should be sufficient substatebias.
This failure causes the n-channel threshold voltageinto the depletion mode. Thus the CMOS cannot work as aninverter.
A very high voltage supply can also cause the failure asthen the current will be very high. The source and substrate ofboth the NMOS and PMOS should be properly biased. This can becontrolled with proper doping. But the easiest recovery method isto increase the substrate bias (Vsb) or decrease the supply voltageif possible.
I hope this helps you.

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