21. (TCO 3) The VHDL signal assignment statement for a 4-input NAND gate is (Poi
ID: 1814320 • Letter: 2
Question
21. (TCO 3) The VHDL signal assignment statement for a 4-input NAND gate is (Points : 7) X = not(A or B or C or D);.X <= not A and not B and not C and not D;.
X = not(A and B and C and D);.
X <= A nand B nand C nand D;.
22. (TCO 3) In VHDL, what are the allowed outputs for a BIT signal type? (Points : 7) 0, 1
true, false
-231 to +231
0, 1, Z
23. (TCO 3) How many state variables are in a MOD-27 counter? (Points : 7) 27
5
26
4
24. (TCO 3) A state diagram for a MOD-16 counter is drawn with 16 bubbles. If the lines connecting the bubbles have arrowheads on both ends, what can we say about the counter? (Points : 7) Nothing, because the drawing is in error.
This represents a 4-bit up-down counter.
This represents a 16-bit binary counter.
This represents a 4-bit ring counter.
25. (TCO 3) Which VHDL term is used to ensure that all unused states in a state machine are properly defined? (Points : 7) ELSE
INCLUDE
DEFAULT
OTHERS 22. (TCO 3) In VHDL, what are the allowed outputs for a BIT signal type? (Points : 7) 0, 1
true, false
-231 to +231
0, 1, Z
Explanation / Answer
21.X <= not A and not B and not C and not D
22.0, 1, Z
23.5
24.This represents a 4-bit ring counter
25.INCLUDE
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