I am having troubles with this lab I am terrible at coding. All of these parts n

Question

I am having troubles with this lab I am terrible at coding. All of these parts need to be in structural form(no if statments or loops), just assign statements.

Part III: A Full Adder

Figure 5a shows a circuit for a full adder, which has the inputs a, b, and ci, and produces
the outputs s and co. Parts b and c of the gure show a circuit symbol and truth table for
the full adder, which produces the two-bit binary sum cos = a + b + ci. Figure 5d shows
how four instances of this full adder module can be used to design a circuit that adds two
four-bit numbers. This type of circuit is usually called a ripple-carry adder, because of the
way that the carry signals are passed from one full adder to the next. Write Verilog code
that implements this circuit, as described below.

1. Create a new Quartus II project for the adder circuit. Write a Verilog module for
the full adder sub-circuit and write a top-level Verilog module that instantiates four
instances of this full adder.
2. Use switches SW7??4 and SW3??0 to represent the inputs A and B, respectively. Use
SW8 for the carry-in cin of the adder. Connect the SW switches to their correspond-
ing red lights LEDR, and connect the outputs of the adder, cout and S, to the green
lights LEDG.
3. Include the necessary pin assignments for the DE2 board, compile the circuit, and
download it into the FPGA chip.

4. Test your circuit by trying dierent values for numbers A, B, and cin. Get your TA's
initials when you can demonstrate correct behavior.

Part IV: One-Digit BCD Adder

In Part II, we discussed the conversion of binary numbers into decimal digits. It is some-
times useful to build circuits that use this method of representing decimal numbers, in
which each decimal digit is represented using four bits. This scheme is known as the binary
coded decimal (BCD) representation. As an example, the decimal value 59 is encoded in
BCD form as 0101 1001.
You are to design a circuit that adds two BCD digits. The inputs to the circuit are
BCD numbers A and B, plus a carry-in, cin. The output should be a two-digit BCD sum
S1S0. Note that the largest sum that needs to be handled by this circuit is S1S0 = 9 + 9
+ 1 = 19. Perform the steps given below.
1. Create a new Quartus II project for your BCD adder. You should use the four-bit
adder circuit from part III to produce a four-bit sum and carry-out for the operation
A + B. A circuit that converts this ve-bit result, which has the maximum value 19,
into two BCD digits S1S0 can be designed in a very similar way as the binary-to-
decimal converter from part II.
2. Use switches SW7??4 and SW3??0 for the inputs A and B, respectively, and use SW8
for the carry-in. Connect the SW switches to their corresponding red lights LEDR,
and connect the four-bit sum and carry- out produced by the operation A + B to the
green lights LEDG. Display the BCD values of A and B on the 7-segment displays
HEX6 and HEX4, and display the result S1S0 on HEX1 and HEX0.
3. Since your circuit handles only BCD digits, check for the cases when the input A or
B is greater than nine. If this occurs, indicate an error by turning on the green light
LEDG8.
4. Include the necessary pin assignments for the DE2 board, compile the circuit, and
download it into the FPGA chip.
5. Test your circuit by trying dierent values for numbers A, B, and cin.

Part V: Two-Digit BCD Adder

Design a circuit that can add two 2-digit BCD numbers, A1A0 and B1B0 to produce the
three-digit BCD sum S2S1S0. Use two instances of your circuit from part IV to build this
two-digit BCD adder. Perform the steps below:
5
1. Use switches SW15??8 and SW7??0 to represent 2-digit BCD numbers A1A0 and B1B0,
respectively. The value of A1A0 should be displayed on the 7-segment displays HEX7
and HEX6, while B1B0 should be on HEX5 and HEX4. Display the BCD sum,
S2S1S0, on the 7-segment displays HEX2, HEX1 and HEX0.
2. Make the necessary pin assignments and compile the circuit.
3. Download the circuit into the FPGA chip, and test its operation. Get your TA's
initials upon successful demonstration of your project.

Part VI: A Dierent Two-Digit Adder

In part V you created Verilog code for a two-digit BCD adder by using two instances of the
Verilog code for a one-digit BCD adder from part IV. A dierent approach for describing
the two-digit BCD adder in Verilog code is to specify an algorithm like the one represented
by the following pseudo-code:
1 T0 = A0 + B0
2 if (T0 > 9) then
3 Z0 = 10;
4 c1 = 1;
5 else
6 Z0 = 0;
7 c1 = 0;
8 end if
9 S0 = T0 ?? Z0
10 T1 = A1 + B1 + c1
11 if (T1 > 9) then
12 Z1 = 10;
13 c2 = 1;
14 else
15 Z1 = 0;
16 c2 = 0;
17 end if
18 S1 = T1 ?? Z1
19 S2 = c2
It is reasonably straightforward to see what circuit could be used to implement this
pseudo-code. Lines 1, 9, 10, and 18 represent adders, lines 2{8 and 11{17 correspond to
multiplexers, and testing for the conditions T0 > 9 and T1 > 9 requires comparators. You
are to write Verilog code that corresponds to this pseudo-code. Note that you can perform
6
addition operations in your Verilog code instead of the subtractions shown in lines 9 and
18.
1. Create a new Quartus II project for your Verilog code. Use the same switches, lights,
and displays as in part V. Compile your circuit.
2. Download your circuit onto the DE2 board and test it by trying dierent values for
numbers A1A0 and B1B0. Get your TA's initials after verifying correct behavior.

Explanation / Answer

wheather u want vhdl or verilog code

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