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Verilog Problem !!! Use HEX1 for the sign bit, HEX0 to display the number result

ID: 1716957 • Letter: V

Question

Verilog Problem !!! Use HEX1 for the sign bit, HEX0 to display the number result and SW[3:0] as your inputs.The number result should be a hexadecimal number. When the sign is positive HEX1 should have all segments turned off. I'm confused about how to display sign bit on 7-sengment display and when the sign is positive, and how to set hex1 all segments turned off. Follows is the code I constructed.

module lab7_p1 (SW, HEX0, HEX1)
input [3:0]SW;
output wire[0:6]HEX0, HEX1;
always @(*)
begin
if (HEX1[6] == 1)

HEX0 <= off;

HEX1 <= off;

end
end
hex7seg p1(SW[3:0],HEX0);
endmodule

always @(num)
case (num)
4'h0 : display = 7'b0000001;
4'h1 : display = 7'b1001111;
4'h2 : display = 7'b0010010;
4'h3 : display = 7'b0000110;
4'h4 : display = 7'b1001100;
4'h5 : display = 7'b0100100;
4'h6 : display = 7'b0100000;
4'h7 : display = 7'b0001111;
4'h8 : display = 7'b0000000;
4'h9 : display = 7'b0001100;
4'hA : display = 7'b0001000;
4'hb : display = 7'b1100000;
4'hC : display = 7'b0110001;
4'hd : display = 7'b1000010;
4'hE : display = 7'b0110000;
4'hF : display = 7'b0111000;
default : display = 7'bx;
endcase
endmodule

Explanation / Answer

we need 5 switches, since sw4 is used for represent sign, if its 1, the value represnt sw3 to sw0 is negative,if its 0  the value represnt sw3 to sw0 is postive.please go through the code.

module lab7_p1 (SW, HEX0, HEX1)
input [4:0]SW;
output wire[0:6]HEX0, HEX1;
always @(*)
begin
if (SW[4] == 1)

HEX1 = 7'b11111111;

else

HEX1 = 7'b0000000;

end
end
hex7seg p1(SW[3:0],HEX0);
endmodule

always @(num)
case (num)
4'h0 : display = 7'b0000001;
4'h1 : display = 7'b1001111;
4'h2 : display = 7'b0010010;
4'h3 : display = 7'b0000110;
4'h4 : display = 7'b1001100;
4'h5 : display = 7'b0100100;
4'h6 : display = 7'b0100000;
4'h7 : display = 7'b0001111;
4'h8 : display = 7'b0000000;
4'h9 : display = 7'b0001100;
4'hA : display = 7'b0001000;
4'hb : display = 7'b1100000;
4'hC : display = 7'b0110001;
4'hd : display = 7'b1000010;
4'hE : display = 7'b0110000;
4'hF : display = 7'b0111000;
default : display = 7'bx;
endcase
endmodule