Given this processor hardware design, add control states to the following to imp

Question

Given this processor hardware design, add control states to the following to implement an exchange-with-memory instruction (as decoded by the when below), such that swap $rt,immed($rs) swaps the values in register rt and memory[rs+immed]. Hint: swaps are usually done using a temporary register -- Y is a good choice. Another hint: you only need to compute rs+immed once, because reading from memory doesn't change the value in the MAR.

when (op()) op(1) Swap

Start:
PCout, MARin, MEMread, Yin
CONST(4), ALUadd, Zin, UNTILmfc
MDRout, IRin
Zout, PCin, JUMPonop
HALT /* Should end here on undecoded op */

Swap:
/* YOUR STATES GO HERE! */

Explanation / Answer

when (op()) op(1) Swap

Start:
PCout, MARin, MEMread, Yin
CONST(4), ALUadd, Zin, UNTILmfc
MDRout, IRin
Zout, PCin, JUMPonop
HALT /* Should end here on undecoded op */

Swap:

SELrs, REGout, Yin
IRimmedout, ALUadd, Zin
Zout, MARin, MEMread
SELrt, REGout, Yin, UNTILmfc
MDRout, SELrt, REGin
Yout, MDRin, MEMwrite, JUMP(Start) /* MAR still has rs+immed */

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