Please refer to the typical CAD system shown in Figure 6 of Module 7 notes. The

Question

Please refer to the typical CAD system shown in Figure 6 of Module 7 notes. The Design Entry has two methods – Schematics Capture and Verilog. In one or more paragraphs, describe each of these methods. Think about one other method of design entry and describe it in one paragraph.

Design Conception DESIGN ENTRY Verilog Schematic Capture Synthesis Functional Simulation No Design Correct? Yes - Physical Design/Fitting Timing Simulation No Timing Analysis Timing Requirments Met?) Chip Configuration A Typical CAD System

Explanation / Answer

1.SCHEMATICS CAPTURE METHOD:

schematic capture or schematic entry is a step in design cycle of Electronic design automation(EDA) at which electronic diagram of the designed electronic circuit is created by the designer. this process done interactively with help of schematic capture tool.the schematic capture tool is also known as schematic editor.the circuit design is the very first step of actual design of an electronic circuit.

Despite the complexity of modern components such as ball grid arrys and tiny passive components.Schematic capture is easier today than it has been for many years.CAD software is easier to use and is available in full-featured expensive packages,very capable mind range packages that some times have free versions.In past years schematic diagrams were fairly readable.Readability levels can be enhanced by using buses and superbuses,realated pins can be conected into a comman bus and routed to other pages buses don't need to be just traditional address or data bus directly linked pins.A bus grouping can also be used for realated uses,such as all analog input or all communications realated pin functions.

2.VERILOG:

Verilog ,standardized as IEEE 1364, is a hardware description language (HDL) used to model electronic systems .It is most commnly used in the design and verification of digital circuits at the register -transfer level of abstraction.it is also used in the verification of analog circuits and mixed -signal circuits

Hardware description languages such as Verilog is differ from software programming languages because they include ways of descibing the propagation time and signal strengths.There are two types of assignment operators;a blocking assignment (=),and non blocking (<=) assignment .the non blocking assignment allows designers to describe the state-mechine update without needing to declare and use temporary storage variables.since thease concepts are part of Verilog's lang uage semantics,designers could quickly write descriptions of large circuits in a relatively compact and concise form.

3.DESIGN ENTRY USING TRUTH TABLE:

  truth table of logic functions& timing waveforms may be specified for desigining the necessary hardware ,using the components available in a optimum way. A CAD system is capable of transfering the truth table or timing waveforms into a network of logic gates is requied for this purpose.the CAD tool used for drawing and transforming it automatically in to network.

This method of design entry can be used only for a small number of variables, since truthtable method of description is possible only for logic functions with a few variables.

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